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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CDCE72010RGCT датащи(PDF) 28 Page - Texas Instruments |
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CDCE72010RGCT датащи(HTML) 28 Page - Texas Instruments |
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28 / 73 page  CDCE72010 SCAS858A – JUNE 2008 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com Register 7: SPI Mode SPI RAM POWER UP BIT NAME RELATED BLOCK DESCRIPTION/FUNCTION BIT BIT CONDITION 0 A0 Address 0 1 1 A1 Address 1 1 2 A2 Address 2 1 3 A3 Address 3 0 4 0 LOCKW 0 Lock-detect window Bit 0 (Refer to Reg 9 RAM Bits 6 and 7) EEPROM 5 1 LOCKW 1 Lock-detect window Bit 1 (Refer to Reg 9 RAM Bits 6 and 7) 6 2 RESERVED Set to 0 LOCK-DET 7 3 LOCKC0 Number of coherent lock events Bit 0 EEPROM 8 4 LOCKC1 Number of coherent lock events Bit 1 9 5 ADLOCK Selects Digital PLL_LOCK 0, Selects Analog PLL_LOCK 1 10 6 PH7ADJC0 11 7 PH7ADJC1 12 8 PH7ADJC2 13 9 PH7ADJC3 Output 7 Coarse phase adjust select for Output Divider 7 EEPROM 14 10 PH7ADJC4 15 11 PH7ADJC5 16 12 PH7ADJC6 17 13 OUT7DIVRSEL0 18 14 OUT7DIVRSEL1 19 15 OUT7DIVRSEL2 Output Divider 7 ratio select 20 16 OUT7DIVRSEL3 Output 7 EEPROM (seeTable 7) 21 17 OUT7DIVRSEL4 22 18 OUT7DIVRSEL5 23 19 OUT7DIVRSEL6 When set to 0, the divider is disabled 24 20 EN7DIV Output 7 EEPROM When set to 1, the divider is enabled 25 21 PECL7HISWING Output 7 High Output Voltage Swing in LVPECL Mode if set to 1 EEPROM 26 22 CMOSMODE7PX LVCMOS mode select for OUTPUT 7 Positive Pin Output 7 EEPROM (X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State 27 23 CMOSMODE7PY 28 24 CMOSMODE7NX LVCMOS mode select for OUTPUT 7 Negative Pin. Output 7 EEPROM (X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State 29 25 CMOSMODE7NY RAM BITS OUTPUT TYPE 30 26 OUTBUFSEL7X Output 7 22 23 24 25 26 27 EEPROM LVPECL 0 0 0 0 0 1 LVDS 0 1 0 1 1 1 31 27 OUTBUFSEL7Y Output 7 LVCMOS See Settings Above(1) 0 0 EEPROM All Outputs Disabled 0 1 0 1 1 0 (1) Use description for bits 22, 23, 24, and 25 for setting the LVCMOS outputs 28 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): CDCE72010 |
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