P89LPC9331FDH datasheet(40/93 Pages) NXP

40 / 93 page

P89LPC9331_9341_9351_9361_3

Product data sheet

Rev. 03 — 2 June 2009

40 of 93

NXP Semiconductors

P89LPC9331/9341/9351/9361

8-bit microcontroller with accelerated two-clock 80C51 core

7.19.1 Reset vector

Following reset, the P89LPC9331/9341/9351/9361 will fetch instructions from either

address 0000H or the Boot address. The Boot address is formed by using the boot vector

as the high byte of the address and the low byte of the address = 00H.

The boot address will be used if a UART break reset occurs, or the non-volatile boot

status bit (BOOTSTAT.0) = 1, or the device is forced into ISP mode during power-on (see

P89LPC9331/9341/9351/9361

User manual). Otherwise, instructions will be fetched from

address 0000H.

7.20 Timers/counters 0 and 1

The P89LPC9331/9341/9351/9361 has two general purpose counter/timers which are

upward compatible with the standard 80C51 Timer 0 and Timer 1. Both can be conﬁgured

to operate either as timers or event counters. An option to automatically toggle the T0

and/or T1 pins upon timer overﬂow has been added.

In the ‘Timer’ function, the register is incremented every machine cycle.

In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its

corresponding external input pin, T0 or T1. In this function, the external input is sampled

once during every machine cycle.

Timer 0 and Timer 1 have ﬁve operating modes (Modes 0, 1, 2, 3 and 6). Modes 0, 1, 2

and 6 are the same for both Timers/Counters. Mode 3 is different.

7.20.1 Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit

Counter with a divide-by-32 prescaler. In this mode, the Timer register is conﬁgured as a

13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.

7.20.2 Mode 1

Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.

7.20.3 Mode 2

Mode 2 conﬁgures the Timer register as an 8-bit Counter with automatic reload. Mode 2

operation is the same for Timer 0 and Timer 1.

7.20.4 Mode 3

When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit

counters and is provided for applications that require an extra 8-bit timer. When Timer 1 is

in Mode 3 it can still be used by the serial port as a baud rate generator.

7.20.5 Mode 6

In this mode, the corresponding timer can be changed to a PWM with a full period of

256 timer clocks.

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