P89LPC970FDH datasheet(42/66 Pages) NXP

42 / 66 page

P89LPC97X_2

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Product data sheet

Rev. 02 — 27 April 2010

42 of 66

NXP Semiconductors

P89LPC970/971/972

8-bit microcontroller with accelerated two-clock 80C51 core

optimize the erase and programming mechanisms. The P89LPC970/971/972 uses VDD as

the supply voltage to perform the Program/Erase algorithms. When voltage supply is

lower than 2.4 V, the BOD flash is tripped and flash erase/program is blocked.

7.29.2 Features

• Programming and erase over the full operating voltage range.

• Byte erase allows code memory to be used for data storage.

• Read/Programming/Erase using ISP/IAP/ICP.

• Internal fixed boot ROM, containing low-level IAP routines available to user code.

• Default loader providing ISP via the serial port, located in upper end of user program

memory.

• Boot vector allows user-provided flash loader code to reside anywhere in the flash

memory space, providing flexibility to the user.

• Any flash program/erase operation in 2 ms.

• Programming with industry-standard commercial programmers.

• Programmable security for the code in the flash for each sector.

• 100000 typical erase/program cycles for each byte.

• 10 year minimum data retention.

7.29.3 Flash organization

The program memory consists of two/four/eight 1 kB sectors on the P89LPC970/971/972

device. Each sector can be further divided into 64-byte pages. In addition to sector erase,

page erase, and byte erase, a 64-byte page register is included which allows from 1 byte

to 64 bytes of a given page to be programmed at the same time, substantially reducing

overall programming time.

7.29.4 Using flash as data storage

The flash code memory array of this device supports individual byte erasing and

programming. Any byte in the code memory array may be read using the MOVC

instruction, provided that the sector containing the byte has not been secured (a MOVC

instruction is not allowed to read code memory contents of a secured sector). Thus any

byte in a non-secured sector may be used for non-volatile data storage.

7.29.5 Flash programming and erasing

Four different methods of erasing or programming of the flash are available. The flash

may be programmed or erased in the end-user application (IAP) under control of the

application’s firmware. Another option is to use the ICP mechanism. This ICP system

provides for programming through a serial clock/serial data interface. As shipped from the

factory, the upper 512 bytes of user code space contains a serial ISP routine allowing for

the device to be programmed in circuit through the serial port. The flash may also be

programmed or erased using a commercially available EPROM programmer which

supports this device. This device does not provide for direct verification of code memory

contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire

user code space.

Remark: When voltage supply is lower than 2.4 V, the BOD flash is tripped and flash

erase/program is blocked.

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