P89LPC970FDH datasheet(27/66 Pages) NXP

27 / 66 page

P89LPC97X_2

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 02 — 27 April 2010

27 of 66

NXP Semiconductors

P89LPC970/971/972

8-bit microcontroller with accelerated two-clock 80C51 core

7.17 Power management

The P89LPC970/971/972 support a variety of power management features.

Power-on detect and brownout detect are designed to prevent incorrect operation during

initial power-up and power loss or reduction during operation.

The P89LPC970/971/972 support three different power reduction modes: Idle mode,

Power-down mode, and total Power-down mode. In addition, individual on-chip

peripherals can be disabled to eliminate unnecessary dynamic power use in any

peripherals that are not required for the application.

Integrated PMU automatically adjusts internal regulators to minimize power consumption

during Idle mode, Power-down mode and total Power-down mode. In addition, the power

consumption can be further reduced in Normal or Idle mode through configuring

regulators mode according to the applications.

7.17.1 Brownout detection

The brownout detect function determines if the power supply voltage drops below a

certain level. Enhanced brownout detection has 3 independent functions: BOD reset,

BOD interrupt and BOD flash.

These three functions are disabled in Power-down mode and Total Power-down mode. In

Normal or Idle mode, BOD reset and BOD flash are always on and can not be disabled in

software. BOD interrupt may be enabled or disabled in software.

BOD reset and BOD interrupt, each has 6 levels. BOE0 to BOE2 (UCFG1[3:5]) are used

as trip point configuration bits of BOD reset. BOICFG0 to BOICFG2 in register BODCFG

are used as trip point configuration bits of BOD interrupt.

BOD reset voltage should be lower than BOD interrupt trip point. BOD flash is used for

flash programming/erase protection and has only 1 trip point at 2.4 V. Please refer to

P89LPC970/971/972 User manual for detail configurations.

If brownout detection works, the brownout condition occurs when VDD falls below the

brownout falling trip voltage and is negated when VDD rises above the brownout rising trip

voltage.

For correct activation of brownout detect, the VDD rise and fall times must be observed.

Please see Table 11 “Static characteristics” for specifications.

Table 8.

SPI/I2C/UART pin remap

Peripherals

Function

Primary pin out

Alternative pin out

SPI

SPICLK

P0.0

MOSI

P1.7

MISO

P1.6

P1.4

I2C

SDA

P1.3

SCL

P1.2

UART

TXD

P1.0

RXD

P1.1

P89LPC970FDH датащи(PDF) 27 Page - NXP Semiconductors

P89LPC970FDH датащи(HTML) 27 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

датащи скачать

ссылки URL