P89LPC970FDH datasheet(30/66 Pages) NXP

30 / 66 page

P89LPC97X_2

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Product data sheet

Rev. 02 — 27 April 2010

30 of 66

NXP Semiconductors

P89LPC970/971/972

8-bit microcontroller with accelerated two-clock 80C51 core

In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its

corresponding count input pin, T0 or T1. In this function, the count input is sampled once

during every machine cycle.

Timer 0 and Timer 1 have five operating modes (Modes 0, 1, 2, 3 and 6). Modes 0, 1, 2

and 6 are the same for both Timers/Counters. Mode 3 is different.

7.19.1 Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit

Counter with a divide-by-32 prescaler. In this mode, the Timer register is configured as a

13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.

7.19.2 Mode 1

Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.

7.19.3 Mode 2

Mode 2 configures the Timer register as an 8-bit Counter with automatic reload. Mode 2

operation is the same for Timer 0 and Timer 1.

7.19.3.1

Mode 3

When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit

counters and is provided for applications that require an extra 8-bit timer. When Timer 1 is

in Mode 3 it can still be used by the serial port as a baud rate generator.

7.19.3.2

Mode 6

In this mode, the corresponding timer can be changed to a PWM with a full period of

256 timer clocks.

7.19.4 Timer overflow toggle output

Timers 0 and 1 can be configured to automatically toggle a port output whenever a timer

overflow occurs. The same device pins that are used for the T0 and T1 count inputs are

also used for the timer toggle outputs. The port outputs will be a logic 1 prior to the first

timer overflow when this mode is turned on.

7.20 Timers/counters 2, 3 and 4

The P89LPC970/971/972 has three external 16-bit timer/counters. All can be configured

to operate either as timers or event counters. An option to automatically toggle pin Tx (x =

2, 3 or 4) upon timer overflow has been added.

In the ‘Timer’ function, the register is incremented every PCLK.

In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its

corresponding count input pin (T2/T3 /T4). In this function, the count input is sampled

once during every machine cycle.

Only external Timer 2/3/4 has the external input pin TxEX (x = 2, 3 or 4). A 1-to-0

transition on this pin can trigger a reload or capture event.

Timer 2, Timer 3 and Timer 4 have three operating modes (Modes 0, 1 and 2).

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