ATmega32A datasheet(33/352 Pages) ATMEL

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8155B–AVR–07/09

ATmega32A

Power Management and Sleep Modes

9.1

Sleep Modes

Sleep modes enable the application to shut down unused modules in the MCU, thereby saving

power. The AVR provides various sleep modes allowing the user to tailor the power consump-

tion to the application’s requirements.

Figure 8-1 on page 25 presents the different clock systems in the ATmega32A, and their distri-

bution. The figure is helpful in selecting an appropriate sleep mode. Table 9-1 shows the

different clock options and their wake-up sources.

Notes:

1. External Crystal or resonator selected as clock source.

2. If AS

2 bit in ASSR is set.

3. Only INT2 or level interrupt INT1 and INT0.

To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a

SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register

select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or

Extended Standby) will be activated by the SLEEP instruction. See Table 9-2 for a summary.

If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU

is then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and

resumes execution from the instruction following SLEEP. The contents of the Register File and

SRAM are unaltered when the device wakes up from sleep. If a Reset occurs during sleep

mode, the MCU wakes up and executes from the Reset Vector.

9.2

Idle Mode

When the SM2:0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode,

stopping the CPU but allowing SPI, USART, Analog Comparator, ADC, Two-wire Serial Inter-

Table 9-1.

Active Clock Domains and Wake Up Sources in the Different Sleep Modes

Active Clock domains

Oscillators

Wake-up Sources

Sleep Mode

Idle

X(2)

XXX

ADC Noise

Reduction

X(2)

X(3)

XXX

Power-down

X(3)

Power-save

X(2)

X(3)

XX(2)

Standby(1)

XX(3)

Extended

Standby(1)

X(2)

XX(2)

X(3)

XX(2)

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