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MCP4728 датащи(PDF) 47 Page - Microchip Technology

номер детали MCP4728
подробное описание детали  12-Bit, Quad Digital-to-Analog Converter with EEPROM Memory
PDF  66 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP4728 датащи(HTML) 47 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS22187C-page 47
MCP4728
6.0
TERMINOLOGY
6.1
Resolution
The resolution is the number of DAC output states that
divide the full scale range. For the 12-bit DAC, the
resolution is 212, meaning the DAC code ranges from 0
to 4095.
6.2
LSB
The least significant bit or the ideal voltage difference
between two successive codes.
EQUATION 6-1:
6.3
Integral Nonlinearity (INL)
Integral nonlinearity (INL) error is the maximum
deviation of an actual transfer function from an ideal
transfer function (straight line). In the MCP4728, INL is
calculated using two end-points (zero and full scale).
INL can be expressed as a percentage of full scale
range (FSR) or in fraction of an LSB. INL is also called
relative accuracy. Equation 6-2 shows how to calculate
the INL error in LSB and Figure 6-1 shows an example
of INL accuracy.
EQUATION 6-2:
INL ERROR
FIGURE 6-1:
INL Accuracy.
6.4
Differential Nonlinearity (DNL)
Differential nonlinearity (DNL) error (see Figure 6-2) is
the measure of step size between codes in actual
transfer function. The ideal step size between codes is
1 LSB. A DNL error of zero would imply that every code
is exactly 1 LSB wide. If the DNL error is less than
1 LSB, the DAC guarantees monotonic output and no
missing codes. The DNL error between any two
adjacent codes is calculated as follows:
EQUATION 6-3:
DNL ERROR
LSB
V
REF
2
n
-------------
=
Where
VREF
=VDD
If external reference is
selected
=
2.048V If internal reference is
selected
n
=
The number of digital input bits,
n = 12 for MCP4728.
V
Full Scale
V
Zero Scale
–
()
4095
---------------------------------------------------------
=
V
Full Scale
V
Zero Scale
–
()
2
12
1
–
---------------------------------------------------------
=
INL
V
OUT
V
Ideal
–
()
LSB
---------------------------------------
=
Where:
INL is expressed in LSB
VIdeal
=
Code*LSB
VOUT
=
The output voltage measured at
the given input code
010
001
000
Analog
Output
(LSB)
DAC Input Code
011
111
100
101
1
2
3
4
5
6
0
7
110
Ideal Transfer Function
Actual Transfer Function
INL = < -1 LSB
INL = 0.5 LSB
INL = - 1 LSB
DNL
ΔV
OUT
LSB
–
LSB
----------------------------------
=
Where:
DNL is expressed in LSB.
ΔV
OUT
=
The measured DAC output
voltage difference between two
adjacent input codes.



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