MCP4728 datasheet(34/66 Pages) MICROCHIP

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MCP4728

DS22187C-page 34

5.5

Writing and Reading Registers

and EEPROM

The Master (MCU) can write or read the DAC input

registers

EEPROM

using

the

I2C

interface

command.

The following sections describe the communication

examples to write and read the DAC registers and

EEPROM using the I2C interface.

5.6

Write Commands for DAC

Registers and EEPROM

Table 5-1 summarizes the write command types and

their functions.The write command is defined by using

three write command type bits (C2, C1, C0) and two

write function bits (W1, W0). The register selection bits

(DAC1, DAC0) are used to select the DAC channel.

TABLE 5-1:

WRITE COMMAND TYPES

Command Field

Write

Function

Command Name

Function

Fast Mode Write

Not Used

Fast Write for DAC

Input Registers

This command writes to the DAC input registers sequentially with lim-

ited configuration bits. The data is sent sequentially from channels A to

D. The input register is written at the acknowledge clock pulse of the

channel’s last input data byte. EEPROM is not affected.

(Note 1)

Write DAC Input Register and EEPROM

01000

Multi-Write for DAC

Input Registers

This command writes to multiple DAC input registers, one DAC input

selection bits (DAC1, DAC0). EEPROM is not affected.

(Note 2)

Sequential Write for

DAC Input Registers

and EEPROM

This command writes to both the DAC input registers and EEPROM

sequentially. The sequential writing is carried out from a starting chan-

nel to channel D. The starting channel is defined by the DAC selection

bits (DAC1 and DAC0).

The input register is written at the acknowledge clock pulse of the last

input data byte of each register. However, the EEPROM data is written

altogether at the same time sequentially at the end of the last byte.

(Note 2),(Note 3)

Single Write for DAC

Input Register and

EEPROM

This command writes to a single selected DAC input register and its

EEPROM. Both the input register and EEPROM are written at the

acknowledge clock pulse of the last input data byte. The writing chan-

nel is defined by the DAC selection bits (DAC1 and DAC0).

(Note 2),(Note 3)

Write I2C Address Bits (A2, A1, A0)

Not Used

Write I2C Address Bits This command writes new I2C address bits (A2, A1, A0) to the DAC

input register and EEPROM.

Write V

REF, Gain, and Power-Down Select Bits (Note 4)

Not Used

Write Reference

(VREF) selection bits

to Input Registers

This command writes Reference (VREF) selection bits of each channel.

Not Used

Write Gain selection

bits to Input Registers

This command writes Gain selection bits of each channel.

Not Used

Write Power-Down

bits to Input Registers

This command writes Power-Down bits of each channel.

Note 1:

The analog output is updated when LDAC pin is (or changes to) “Low”. UDAC bit is not used for this command.

The DAC output is updated when LDAC pin or UDAC bit is “Low”.

The device starts writing to the EEPROM on the acknowledge clock pulse of the last channel. The device does not

execute any command until RDY/BSY bit comes back to “High”.

The input and output registers are updated at the acknowledge clock pulse of the last byte. The update does not require

LDAC pin or UDAC bit conditions. EEPROM is not affected.

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