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MCP4728 датащи(PDF) 28 Page - Microchip Technology

номер детали MCP4728
подробное описание детали  12-Bit, Quad Digital-to-Analog Converter with EEPROM Memory
PDF  66 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP4728 датащи(HTML) 28 Page - Microchip Technology

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MCP4728
DS22187C-page 28
© 2009 Microchip Technology Inc.
4.10
Normal and Power-Down Modes
Each channel has two modes of operation: (a) Normal
mode where analog voltage is available and (b)
Power-Down mode which turns off most of the internal
circuits for power savings.
The user can select the operating mode of each
channel individually by setting the Power-Down
selection bits (PD1 and PD0). For example, the user
can select normal mode for channel A while selecting
power-down mode for all other channels.
See
Section 5.6 “Write Commands for DAC
Registers and EEPROM” for more details on the
writing the power-down bits.
Most of the internal circuit in the powered down chan-
nel are turned off. However, the internal voltage refer-
ence circuit is not affected by the Power-Down mode.
The internal voltage reference circuit is turned off only
if all channels select external reference (VREF = VDD).
Device actions during Power-Down mode:
• The powered down channel stays in a power sav-
ing condition by turning off most of its circuits.
• No analog voltage output at the powered down
channel.
• The output (VOUT) pin of the powered down
channel is switched to a known resistive load. The
value of the resistive load is determined by the
state of the Power-Down bits (PD1 and PD0).
Table 4-7 shows the outcome of the Power-Down
bit settings.
• The contents of both the DAC registers and
EEPROM are not changed.
• Draws less than 40 nA (typical) when all four
channels are powered down and VDD is selected
as the voltage reference.
Circuits that are not affected during Power-Down
Mode:
•The I2C serial interface circuits remain active in
order to receive any command from the Master.
• The internal voltage reference circuit stays
turned-on if it is selected as reference by at least
one channel.
Exiting Power-Down Mode:
The device exits Power-Down mode immediately by
the following commands:
• Any write command for normal mode. Only
selected channel is affected.
• I2C General Call Wake-Up Command. All
channels are affected.
•I2C General Call Reset Command. This is a
conditional case. The device exits Power-Down
mode depending on the Power-Down bit settings
in EEPROM as the configuration bits and DAC
input codes are uploaded from EEPROM. All
channels are affected.
When the DAC operation mode is changed from the
Power-Down to normal mode, there will be a time delay
until the analog output is available. Typical time delay
for the output voltage is approximately 4.5 µs. This time
delay is measured from the acknowledge pulse of the
I2C serial communication command to the beginning of
the analog output (VOUT). This time delay is not
included in the output settling time specification. See
Section 2.0 “Typical Performance Curves” for more
details.
FIGURE 4-1:
Output Stage for
Power-Down Mode.
TABLE 4-7:
POWER-DOWN BITS
PD1
PD0
Function
00
Normal Mode
01
1k
Ω resistor to ground (Note 1)
10
100 k
Ω resistor to ground
(Note 1)
11
500 k
Ω resistor to ground
(Note 1)
Note 1: In Power-Down mode: V
OUT is off and
most of internal circuits in the selected
channel are disabled.
1k
Ω
100 k
Ω 500 kΩ
Power-Down
Control Circuit
Resistive
Load
VOUT
OP
Amp
Resistor String DAC



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