MCP4728 datasheet(26/66 Pages) MICROCHIP

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MCP4728

DS22187C-page 26

4.5

Voltage Reference

The device has a precision internal voltage reference

which provides a nominal voltage of 2.048V. The user

can select the internal voltage reference or VDD as the

voltage reference source of each channel using the

VREF configuration bit. The internal voltage reference

circuit is turned off when all channels select VDD as

their references. However, it stays turned on if any one

of the channels selects the internal reference.

4.6

LSB Size

The LSB is defined as the ideal voltage difference

between two successive codes. LSB sizes of the

MCP4728 device are shown in Table 4-4.

4.7

DAC Output Voltage

Each channel has an independent output associated

with its own configuration bit settings and DAC input

code. When the internal voltage reference is selected

(VREF = internal), it supplies the internal VREF voltage

to the resistor string DAC of the channel. When the

external reference (VREF=VDD) is selected, VDD is used

for the channel’s resistor string DAC.

The VDD needs to be as clean as possible for accurate

DAC performance. When the VDD is selected as the

voltage reference, any variation or noises on the VDD

line can directly affect on the DAC output.

The

analog

output

each

channel

has

programmable gain block. The rail-to-rail output

amplifier has a configurable gain of 1 or 2. But the gain

of 2 is not applicable if VDD is selected for the voltage

reference. The formula for the analog output voltage is

given in Equation 4-1 and Equation 4-2.

4.7.1

OUTPUT VOLTAGE RANGE

The DAC output voltage range varies depending on the

voltage reference selection.

• When the internal reference (VREF=2.048V) is

selected:

-VOUT = 0.000V to 2.048V * 4095/4096 for

Gain of 1

-VOUT = 0.000V to 4.096V * 4095/4096 for

Gain of 2

• When the external reference (VREF=VDD) is

selected:

-VOUT = 0.000V to VDD

EQUATION 4-1:

VOUT FOR VREF =

INTERNAL REFERENCE

EQUATION 4-2:

VOUT FOR VREF = VDD

4.8

Output Voltage Update

The following events update the output registers

(VOUT):

LDAC pin to “Low”: Updates all DAC channels.

UDAC bit to “Low”: Updates a selected channel

only.

General Call

Software

Update

Command:

Updates all DAC channels.

Power-On-Reset or General Call Reset com-

mand: Both input and output registers are

updated with EEPROM data. All channels are

affected.

4.8.1

LDAC PIN AND UDAC BIT

The user can use the LDAC pin or UDAC bit to upload

the input DAC register to output DAC register (VOUT).

However, the UDAC affects only the selected channel

while the LDAC affects all channels. The UDAC bit is

not used in the Fast Mode Writing.

Table 4-5 shows the output update vs. LDAC pin and

UDAC bit conditions.

TABLE 4-4:

LSB SIZES (EXAMPLE)

VREF

Gain (GX)

Selection

LSB Size

Condition

Internal

VREF

(2.048V)

0.5 mV

2.048V/4096

1 mV

4.096V/4096

VDD

VDD/4096

(Note 1)

Note 1: LSB size varies with the V

DD range.

When VREF = VDD, the device uses

GX = 1 by default. GX = 2 option is

ignored.

Note that the gain selection bit is not applicable for

VREF = VDD. In this case, Gain of 1 is used regard-

less of the gain selection bit setting.

OUT

REF

()

4096

------------------------------- G

≤

Where:

VREF = 2.048V for internal reference selection

Dn =

DAC input code

Gain Setting

OUT

()

4096

-----------------------------

Where:

DAC input code

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