MCP4728 datasheet(42/66 Pages) MICROCHIP

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MCP4728

DS22187C-page 42

FIGURE 5-11:

Write Command: Write I2C Address Bits to the DAC Registers and EEPROM.

Command Type Bits:

C2=0

C1=1

C0=1

1st Byte

2nd Byte

Command New Address Bits

(for confirmation)

Note 3

(Notes 1, 2, 3)

LDAC Pin

4th Byte

Start

3rd Byte

Stop

S 1 100 A2 A1 A0 0 A0 1 1 A2 A1 A0 0 1 A 011 A2 A1 A0 1 0 A

011 A2 A1 A0 1 1 A P

Clock and LDAC Transition Details:

Note 1: Clock Pulse and LDAC Transition Details.

2: LDAC pin events at the 2nd and 3rd bytes:

Keep LDAC pin “High” until the end of the positive pulse of the 8th clock of the

2nd byte.

LDAC pin makes a transition from “High” to “Low” during the negative pulse of the

8th clock of the 2nd byte (just before the rising edge of the 9th clock), and stays

“Low” until the rising edge of the 9th clock of the 3rd byte.

The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and

(b) are not met.

3: LDAC pin resumes its normal function after “Stop” bit.

4: EEPROM Write:

Charge Pump initiates the EEPROM write sequence at the falling edge of the 4th

byte’s ACK pulse.

The RDY/BSY bit (pin) goes “Low” at the falling edge of this ACK clock and back

to “High” immediately after the EEPROM write is completed.

Type

R/W

Device

Current

Address Bits

Type

Command

Current

Address Bits

Code

New

Address Bits

Type

Command

Note 4

Note 3

Clock Pulse

LDAC Pin

2nd Byte

3rd Byte

4th Byte

Note 2 (a)

ACK (

MCP4728)

Note 2(b)

Stay “Low” during this 3rd byte

Note 2(b)

(CLK Line)

-----

Stop

Note 4

(C2 C1 C0)

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