TSB41BA3DIPFP datasheet(23/59 Pages) TI

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TSB41BA3D

www.ti.com ............................................................................................................................................... SLLS959A – DECEMBER 2008 – REVISED MARCH 2009

Table 7. Page 0 (Port Status) Register Field Descriptions (continued)

FIELD

SIZE

TYPE

DESCRIPTION

Max_port_speed

Rd/Wr

Max_port_speed

The maximum speed at which a port is allowed to operate in Beta mode. The encoding is:

000 = S100

001 = S200

010 = S400

011 = S800

100 = S1600

101 = S3200

110 = reserved

111 = reserved

An attempt to write to the register with a value greater than the hardware capability of the port

results in the maximum value that the port is capable of being stored in the register. The port

uses this register only when a new connection is established in the Beta mode or when a port

is programmed as a Beta-only port. When a port is programmed as a bilingual port, it is fixed

at S400 for the Beta speed and is not updated by a write to this register. The power reset

value is the maximum speed capable of the port. Software can modify this value to force a

port to train at a lower-than-maximum speed (when in a Beta-only mode), but no lower than

the minimum speed.

LPP

This flag is set permanently to 1.

(Local_plug_present)

Cable_speed

This variable is set to the maximum speed that the port is capable of in Beta mode. The

encoding is the same as for Max_port_speed.

Connection_unreliable

Rd/Wr

If this bit is set to 1, then a Beta-mode speed negotiation has failed or synchronization has

failed. A write of 1 to this field resets the value to 0.

Beta_mode

Operating in Beta mode. If this bit is 1, the port is operating in Beta mode; it is equal to 0

otherwise (that is, when operating in 1394a-2000 mode, or when disconnected). If Con is 1,

RxOK is 1, and Beta_mode is 0, then the port is active and operating in the 1394a-2000

mode.

Port_error

Rd/Wr

Incremented whenever the port receives an invalid codeword, unless the value is already 255.

Cleared when read (including being read by means of a remote access packet). Intended for

use by a single bus-wide diagnostic program.

Sleep_Flag

This bit is set to 1 if the port is in the sleep state. The transition to the sleep state occurs only

if the port has been enabled for the sleep mode.

Sleep_enable

Rd/Wr

This bit is set to 1 if the port has been enabled for sleep mode. If the SLPEN terminal is

sampled high during reset, then this bit is set high for all ports. If sampled low, then it is 0.

Software can individually enable or disasble sleep mode for a port by writing to this bit. Sleep

mode operation is described in the IDB-1394 specification. In PMC mode when no link is

present, the sleep state of each port can be monitored on the data lines as described in the

Terminal Functions table entry for LCLK_PMC.

Loop_disable

This bit is set to 1 if the port has been placed in the loop-disable state as part of the loop-free

build process (the PHYs at either end of the connection are active, but if the connection itself

were activated, then a loop would exist). Cleared on bus reset and on disconnection.

In_standby

This bit is set to 1 if the port is in standby power-management state.

Hard_disable

Rd/Wr

No effect unless the port is disabled. If this bit is set to 1, the port does not maintain

connectivity status on an ac connection when disabled. The values of the Con and RxOK bits

are forced to 0. This flag can be used to force renegotiation of the speed of a connection. It

can also be used to place the device into a lower-power state because when hard-disabled, a

port no longer tones to maintain 1394b ac-connectivity status.

The vendor identification page identifies the vendor/manufacturer and compliance level. The page is selected by

writing 1 to the Page_Select fieldin base register 7. Table 8 shows the configuration of the vendor identification

page, and Table 9 shows the corresponding field descriptions.

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