TSB41BA3DIPFP datasheet(42/59 Pages) TI

42 / 59 page

PCLK

(a)

(c)

(b)

CTL0, CTL1

D0–D7

LREQ

LPS

tLPS_RESET

(d)

tLPS_DISABLE

TSB41BA3D

SLLS959A – DECEMBER 2008 – REVISED MARCH 2009 ............................................................................................................................................... www.ti.com

d. Interface restored. After the minimum tRESTORE time, the LLC can again assert LPS active. When LPS is

asserted, the interface is initialized as described in the following paragraph.

If the LLC continues to keep the LPS signal deasserted, it then requests that the interface be disabled. The PHY

disables the interface when it observes that LPS has been deasserted for tLPS_DISABLE. When the interface is

disabled, the PHY sets its CTL and D outputs as previously stated for interface reset, but also stops PCLK

activity. The interface is also placed into the disabled condition on a hardware reset of the PHY. Figure 20 shows

the timing for the interface disable.

When the interface is disabled, the PHY enters a low-power state if none of its ports are active.

Figure 20. Interface Disable

The sequence of events for disabling the PHY-LLC is as follows:

a. Normal operation. Interface is operating normally, with LPS active, PCLK active, status and packet data

reception and transmission via the CTL and D lines, and request activity via the LREQ line.

b. LPS deasserted. The LLC deasserts the LPS signal and, within 1

µs, terminates any request or interface bus

activity, places its CTL and D outputs into a high-impedance state, and drives its LREQ output low.

c. Interface reset. After tLPS_RESET time, the PHY determines that LPS is inactive, terminates any interface bus

activity, and drives its CTL and D outputs low. The PHY-LLC interface is now in the reset state.

d. Interface disabled. If the LPS signal remains inactive for tLPS_DISABLE time, then the PHY terminates PCLK

activity by driving the PCLK output low. The PHY-LLC interface is now in the disabled state.

Submit Documentation Feedback

Product Folder Link(s): TSB41BA3D

TSB41BA3DIPFP датащи(PDF) 42 Page - Texas Instruments

TSB41BA3DIPFP датащи(HTML) 42 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

датащи скачать

ссылки URL