HD6432351 datasheet(127/1025 Pages) RENESAS

127 / 1025 page

Section 5 Interrupt Controller

Rev. 3.00 Sep 15, 2006 page 93 of 988

REJ09B0330-0300

5.1.3

Pin Configuration

Table 5.1 summarizes the pins of the interrupt controller.

Table 5.1

Interrupt Controller Pins

Name

Symbol

I/O

Function

Nonmaskable interrupt

NMI

Input

Nonmaskable external interrupt; rising or

falling edge can be selected

External interrupt

requests 7 to 0

IRQ7 to IRQ0 Input

Maskable external interrupts; rising, falling, or

both edges, or level sensing, can be selected

5.1.4

Table 5.2 summarizes the registers of the interrupt controller.

Table 5.2

Interrupt Controller Registers

Name

Abbreviation

R/W

Initial Value

Address*

System control register

SYSCR

R/W

H'01

H'FF39

IRQ sense control register H

ISCRH

R/W

H'00

H'FF2C

IRQ sense control register L

ISCRL

R/W

H'00

H'FF2D

IRQ enable register

IER

R/W

H'00

H'FF2E

IRQ status register

ISR

R/(W)*

H'00

H'FF2F

Interrupt priority register A

IPRA

R/W

H'77

H'FEC4

Interrupt priority register B

IPRB

R/W

H'77

H'FEC5

Interrupt priority register C

IPRC

R/W

H'77

H'FEC6

Interrupt priority register D

IPRD

R/W

H'77

H'FEC7

Interrupt priority register E

IPRE

R/W

H'77

H'FEC8

Interrupt priority register F

IPRF

R/W

H'77

H'FEC9

Interrupt priority register G

IPRG

R/W

H'77

H'FECA

Interrupt priority register H

IPRH

R/W

H'77

H'FECB

Interrupt priority register I

IPRI

R/W

H'77

H'FECC

Interrupt priority register J

IPRJ

R/W

H'77

H'FECD

Interrupt priority register K

IPRK

R/W

H'77

H'FECE

Notes: 1. Lower 16 bits of the address.

2. Can only be written with 0 for flag clearing.

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