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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6432351 датащи(PDF) 31 Page - Renesas Technology Corp |
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HD6432351 датащи(HTML) 31 Page - Renesas Technology Corp |
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31 / 1025 page  Rev. 3.00 Sep 15, 2006 page xxxi of xxxiv 18.1.1 Block Diagram ..................................................................................................... 675 18.2 Operation........................................................................................................................... 676 Section 19 Clock Pulse Generator .................................................................................. 677 19.1 Overview........................................................................................................................... 677 19.1.1 Block Diagram ..................................................................................................... 677 19.1.2 Register Configuration ......................................................................................... 678 19.2 Register Descriptions ........................................................................................................ 678 19.2.1 System Clock Control Register (SCKCR)............................................................ 678 19.3 Oscillator........................................................................................................................... 679 19.3.1 Connecting a Crystal Resonator ........................................................................... 679 19.3.2 External Clock Input ............................................................................................ 681 19.4 Duty Adjustment Circuit ................................................................................................... 683 19.5 Medium-Speed Clock Divider........................................................................................... 683 19.6 Bus Master Clock Selection Circuit .................................................................................. 683 Section 20 Power-Down Modes...................................................................................... 685 20.1 Overview........................................................................................................................... 685 20.1.1 Register Configuration ......................................................................................... 686 20.2 Register Descriptions ........................................................................................................ 687 20.2.1 Standby Control Register (SBYCR)..................................................................... 687 20.2.2 System Clock Control Register (SCKCR)............................................................ 689 20.2.3 Module Stop Control Register (MSTPCR) .......................................................... 690 20.3 Medium-Speed Mode........................................................................................................ 690 20.4 Sleep Mode ....................................................................................................................... 691 20.5 Module Stop Mode ........................................................................................................... 692 20.5.1 Module Stop Mode .............................................................................................. 692 20.5.2 Usage Notes ......................................................................................................... 694 20.6 Software Standby Mode .................................................................................................... 694 20.6.1 Software Standby Mode....................................................................................... 694 20.6.2 Clearing Software Standby Mode ........................................................................ 695 20.6.3 Setting Oscillation Stabilization Time after Clearing Software Standby Mode ... 696 20.6.4 Software Standby Mode Application Example .................................................... 697 20.6.5 Usage Notes ......................................................................................................... 698 20.7 Hardware Standby Mode................................................................................................... 698 20.7.1 Hardware Standby Mode...................................................................................... 698 20.7.2 Hardware Standby Mode Timing......................................................................... 699 20.8 φ Clock Output Disabling Function................................................................................... 700 Section 21 Electrical Characteristics.............................................................................. 701 21.1 Absolute Maximum Ratings.............................................................................................. 701 |
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