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38K2 датащи(PDF) 85 Page - Renesas Technology Corp |
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38K2 датащи(HTML) 85 Page - Renesas Technology Corp |
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85 / 358 page ![]() FUNCTIONAL DESCRIPTION Rev.2.00 Oct 15, 2006 page 66 of 130 38K2 Group REJ09B0338-0200 HARDWARE b7 b0 DSCONN1 DSPTEN1 DSSUSP1 DSDETE1 DSRSTO1 DSRSMO1 DSRMOD1 DSLSPD1 – – – – – – – – 0 0 0 0 0 0 0 0 DP1 control register (DP1CON) [address 002C16] Bit name Bit symbol At reset Function H/W S/W Downstream port 1 connect bit Downstream port 1 enable bit Downstream port 1 suspend bit Downstream port 1 connect- state detection enable bit Downstream port 1 SE0 signal transmit bit Downstream port 1 resume signal transmit bit Downstream port 1 bus-state read mode control bit Downstream port 1 USB transfer 0 : Disconnect ; PTCON1 interrupt enabled 1 : Connect ; PTDIS1 interrupt enabled 0 : Downstream port 1 disabled 1 : Downstream port 1 enabled ; This bit is cleared when an interrupt of PTDIS1 or PTERR1 is generated. 0 : No port suspended 1 : Port suspended; This bit is cleared when an interrupt of PTDIS1 or PTRSM1 is generated. 0 : Connect/disconnect-state detection disabled ; PTCON1 and PTDIS1 interrupts disabled 1 : Connect/disconnect-state detection enabled ; This bit is cleared when an interrupt of PTCON1, PTDIS1 or PTERR1 is generated. 0 : Being not output 1 : SE0 signal being output 0 : Being not output 1 : K-signal being output ; When writing “0”, a low-speed EOP is output and then a transition to being not output occurs. 0 : Mode where a downstream port 1 bus-state is read, using RD signal 1 : Mode where a downstream port 1 bus-state is read, using EOF2 signal (internal signal) 0 : Full-speed mode (12MHz) 1 : Low-speed mode (1.5 MHz) O O O O O O O O O O O O O O O O –: State remaining W R Fig. 97 Structure of DP1 control register b7 b0 D1MINUS D1PLUS b7:b2 DP1 status register (DP1STS) [address 002D16] Bit name Bit symbol At reset Function H/W S/W –: State remaining 00 0 0 0 0 D1- signal bit D1+ signal bit Not used In- definite In- definite – In- definite In- definite – O O O ✕ ✕ O In DSRMOD1 = “0”, a downstream port 1 bus-state is read, using RD signal. In DSRMOD1 = “1”, a downstream port 1 bus-state is read, using EOF2 signal (internal signal). In DSRMOD1 = “0”, a downstream port 1 bus-state is read, using RD signal. In DSRMOD1 = “1”, a downstream port 1 bus-state is read, using EOF2 signal (internal signal). Write “0” when writing. “0” is read when reading. W R Fig. 98 Structure of DP1 status register |
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