ORSPI4 datasheet(163/263 Pages) LATTICE

163 / 263 page

Lattice Semiconductor

ORCA ORSPI4 Data Sheet

163

SPI4 Core TX/RX Control Registers (Read and Write)

30914 A

30A14 B

[0]

Reserved

[1]

Reserved

[2]

RX_ILLEGAL_CTL_I

NT_EN

This bit enables the status ﬂag and the interrupt when the SPI4 receives

unsupported extended control words.

[3:4]

Reserved

[5]

RX_DIP4_INT_EN

This bit enables the status ﬂag and the interrupt for the SPI4 core RX detec-

tion of a DIP4 error.

[6]

TX_DIP2_INT_EN

This bit enables the status ﬂag and the interrupt for the SPI4 core TX detec-

tion of a status framing error (either DIP2 or unexpected 11 pattern).

[7]

RX_ASYNC_FIFO_O

VERRUN_INT_EN

This bit enables the status ﬂag and the interrupt for the SPI4 core asynchro-

nous FIFO in RDP block being overrun.

30915 A

30A15 B

[0]

SPI4_QUARTER_RA

When set to ‘1’, enables data rates of 100 - 200 Mbps. The PLLs in the

transmit and receive SPI4 high-speed blocks are bypassed in this mode.

[1]

SPI4_LOOPBK_FE

This control enables far-end loopback when it is set to 1. Far-end loopback

sends RDAT inputs back to TDAT outputs, sends RDCLK back to TDCLK,

sends TSTAT back to RSTAT outputs, and ATSCLK back to RSCLK.

[2]

SPI4_LOW_SPEED_

DATA_SEL

Forces low speed data rates of (400-622 Mbits/s). The transmit PLL is still

used to synthesize the SPI4 transmit clock TDCLK. However, the dynamic

alignment block in the receive side is bypassed. No training sequences are

used in low speed mode.

[3]

SPI4_STATUS_IO_S

‘0’ - Selects LVTTL I/O for SPI4 status

‘1’ - Selects LVDS I/Os for SPI4 status (Full-rate LVDS status I/Os speciﬁed

by OIF SPI4.0 is not supported).

[4]

SPI4_LOOPBK_HS

Enables loops from high-speed SPI4 TDAT outputs to RDAT inputs and

RSTAT to TSTAT status inputs just before I/O.

[5]

SPI4_LOOPBK_LS

Enables near-end parallel loop from TDP to RDP blocks and RSP to TSP

blocks bypassing the high-speed SPI4 interface logic blocks. Must enable

SPI4_LOOPBK_HS for this to work.

[6]

TX_FORCE_DIP4_E

Causes TDP to send bad parity code words.

[7]

RX_FORCE_DIP2_E

Causes RSP to send bad parity code words.

30916 A

30A16 B

[0:2]

Reserved

[3]

MIN_BURST_MODE 00

Set minimum burst mode for transmit path

[4]

RX_CAL_SW_EN

Inserts the calendar select word after the frame sync pattern on the receive

SPI4 status channel

[5]

RX_CAL_SEL

0 = Selects main calendar for outgoing RX status frame (calendar select

word will be “01”)

1 = Selects shadow calendar (calendar select word will be “10”)

[6]

TX_CAL_SW_EN

Detect the calendar select word after the frame sync pattern on the transmit

status

[7]

TX_BURST_TERMIN

ATION

Mode control for managing the transmission of bursts when the DPRAM

partition becomes empty in the middle of a burst.

0 =continue to try to access DPRAM for the remainder of burst.

1 = abort the burst.

Table 47. Memory Map (Continued)

(0x)

Abso-

lute

Address

Bit

Name

Reset

Value

(0x)

Description

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