ORSPI4 datasheet(165/263 Pages) LATTICE

165 / 263 page

Lattice Semiconductor

ORCA ORSPI4 Data Sheet

165

30925 A

30A25 B

[0:5]

Reserved

[6:7]

TX_CAL_LEN_SHD

Shadow calendar length for the transmit status frame of SPI4. Upper 2 bits

30926

30A26

[0:7]

TX_CAL_LEN_SHD

Shadow calendar length for the transmit status frame of SPI4. Lower 8 bits

30927 A

30A27 B

[0:1]

TX_DPRAM_0_NUM

FIFO

Number of virtual FIFOs in TX DPRAM bank 0

00 = >1 FIFO

01 = >2 FIFOs

10 = >4 FIFOs

11 = >8 FIFOs

[2:3]

TX_DPRAM_1_NUM

FIFO

Number of virtual FIFOs in TX DPRAM bank 1

[4:5]

TX_DPRAM_2_NUM

FIFO

Number of virtual FIFOs in TX DPRAM bank 2

[6:7]

TX_DPRAM_3_NUM

FIFO

Number of virtual FIFOs in TX DPRAM bank 3

30930 A

30A30 B

[0:1]

TX_DPRAM_0_AGG

R_MODE

TX bank 0 aggregation mode

00 = 32 bit data

01 = 64-bit data

10 = 128-bit data

11 = not valid

[2:3]

TX_DPRAM_1_AGG

R_MODE

TX bank 1 aggregation mode

[4:5]

TX_DPRAM_2_AGG

R_MODE

TX bank 2 aggregation mode

[6:7]

TX_DPRAM_3_AGG

R_MODE

TX bank 3 aggregation mode

30931 A

30A31 B

[0:5]

Reserved

[6:7]

TX_MAX_BURST1

Maximum number of 16-byte bursts expected for any port when its status is

STARVING. These are the 2 most signiﬁcant bits of a 10-bit number

30932 A

30A32

[0:7]

TX_MAX_BURST1

Maximum number of 16-byte bursts expected for any port when its status is

STARVING. These are the 8 least signiﬁcant bits of a 10-bit number

30933 A

30A33 B

[0:5]

Reserved

[6:7]

TX_MAX_BURST2

Maximum number of 16-byte bursts expected for any port when its status is

HUNGRY. These are the 2 most signiﬁcant bits of a 10-bit number

30934 A

30A34 B

[0:7]

TX_MAX_BURST2

Maximum number of 16-byte bursts expected for any port when its status is

HUNGRY. These are the 8 least signiﬁcant bits of a 10-bit number

30935 A

30A35 B

[0:7]

TX_DATA_MAX_T

(byte a)

Maximum interval between training sequences on the transmit data inter-

face. A 32-bit number is formed from 4 bytes organized as {a, b, c, d} and

read left to right. When this number is “0”, training sequences are disabled.

30936 A

30A36 B

[0:7]

TX_DATA_MAX_T

(byte b)

Maximum interval between training sequences on the transmit data inter-

face. A 32-bit number is formed from 4 bytes organized as {a, b, c, d} and

read left to right. When this number is “0”, training sequences are disabled.

30937 A

30A37 B

[0:7]

TX_DATA_MAX_T

(byte c)

Maximum interval between training sequences on the transmit data inter-

face. A 32-bit number is formed from 4 bytes organized as {a, b, c, d} and

read left to right. When this number is “0”, training sequences are disabled.

30940 A

30A40 B

[0:7]

TX_DATA_MAX_T

(byte d)

Maximum interval between training sequences on the transmit data inter-

face. A 32-bit number is formed from 4 bytes organized as {a, b, c, d} and

read left to right. When this number is "0", training sequences are disabled.

Table 47. Memory Map (Continued)

(0x)

Abso-

lute

Address

Bit

Name

Reset

Value

(0x)

Description

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