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ORSPI4 датащи(PDF) 60 Page - Lattice Semiconductor

номер детали ORSPI4
подробное описание детали  Dual SPI4 Interface and High-Speed SERDES FPSC
PDF  263 Pages
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производитель  LATTICE [Lattice Semiconductor]
домашняя страница  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

ORSPI4 датащи(HTML) 60 Page - Lattice Semiconductor

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Lattice Semiconductor
ORCA ORSPI4 Data Sheet
60
Figure 21. Write Synchronization Sequence for 32-Bit Mode
Transmit Calendar
Minimum Port Gap
for 32-bit Mode
.
.
Port 0
Port 1
Port 2
Port 3
Port 0
.
.
Minimum separation between repeating
port numbers in Transmit Calendar = 4 for
32-bit mode to allow time to load Transmit
FIFOs for data bursts of any length
Each port in a minimum separation must
be located in a different bank
Set equal
BURST_VAL
for all ports
32-bit Mode (BURST_VAL = 4 example)
SPI[A,B]_k_CLK_j
Port 0
Port 1
Port 2
Port 3
Port 0
. . .
1 port duration =
BURST_VAL
clock cycles
End last write no later
than 2 clock cycles before
end of port cycle*
Start 1 st write no sooner than 6
clock cycles before beginning of
initial port cycle*
End of data
burst read for
Port 0
. . .
* Rules valid for any value of
BURST_VAL in 32-bit mode
. . .
SPI[A,B]_k_PORT_ID
Range for Transmit FIFO writes
Port 0, write 1
Port 0, write 2
Port 0, write 3
Port 0, write 4
Conditions for writing to transmit FIFO:
1. If BURST_VAL worth of data is ready to be transmitted
and
2. Port status is not SATISFIED
and
3. Within valid time to load portís transmit FIFO as shown above
then
OK to load transmit FIFO with BURST_VAL of data for that port



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