PSD813F1 datasheet(30/120 Pages) STMICROELECTRONICS

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PSD813F1-A

Preliminary

9.1.1.7.2 Data Toggle

Checking the Data Toggle bit on DQ6 is a method of determining whether a Program or

Erase instruction is in progress or has completed. Figure 6 shows the Data Toggle

algorithm.

When the MCU issues a programming instruction, the embedded algorithm within the

PSD813F1 begins. The MCU then reads the location of the byte to be programmed in

Flash to check status. Data bit DQ6 of this location will toggle each time the MCU reads

this location until the embedded algorithm is complete. The MCU continues to read this

location, checking DQ6 and monitoring the Error bit on DQ5. When DQ6 stops toggling

(two consecutive reads yield the same value), and the Error bit on DQ5 remains ‘0’, then

the embedded algorithm is complete. If the Error bit on DQ5 is ‘1’, the MCU should test

DQ6 again, since DQ6 may have changed simultaneously with DQ5 (see Figure 6).

The Error bit at DQ5 will be set if either an internal timeout occurred while the embedded

algorithm attempted to program the byte, or if the MCU attempted to program a ‘1’ to a bit

that was not erased (not erased is logic ‘0’).

It is suggested (as with all Flash memories) to read the location again after the embedded

programming algorithm has completed to compare the byte that was written to Flash with

the byte that was intended to be written.

When using the Data Toggle method after an erase instructin, Figure 6 still applies. DQ6 will

toggle until the erase operation is complete. A ‘1’ on DQ5 will indicate a timeout failure of

the erase operation, a ‘0’ indicates no error. The MCU can read any location within the

sector being erased to get DQ6 and DQ5.

PSDsoft will generate ANSI C code functions which implement these Data Toggling

algorithms.

The

PSD813F1

Functional

Blocks

(cont.)

Figure 6. Data Toggle Flow Chart

START

READ

DQ5 & DQ6

YES

DQ6

TOGGLE

DQ5

DQ6

TOGGLE

READ DQ6

FAIL

PASS

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