TMS320DM643 datasheet(75/162 Pages) TI

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5.5 Interrupts

5.5.1

Interrupt Sources and Interrupt Selector

TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269C – FEBRUARY 2005 – REVISED JANUARY 2007

The C64x DSP core supports 16 prioritized interrupts, which are listed in Table 5-7. The highest-priority

interrupt is INT_00 (dedicated to RESET) while the lowest-priority interrupt is INT_15. The first four

interrupts (INT_00–INT_03) are non-maskable and fixed. The remaining interrupts (INT_04–INT_15) are

maskable and default to the interrupt source specified in Table 5-7. The interrupt source for interrupts

4–15 can be programmed by modifying the selector value (binary value) in the corresponding fields of the

Interrupt Selector Control registers: MUXH (address 0x019C0000) and MUXL (address 0x019C0004).

Table 5-7. DM643 DSP Interrupts

INTERRUPT

CPU

SELECTOR

INTERRUPT

VALUE

INTERRUPT SOURCE

CONTROL

EVENT

NUMBER

(BINARY)

INT_00(1)

–

RESET

INT_01(1)

–

NMI

INT_02(1)

–

Reserved

Reserved. Do not use.

INT_03(1)

–

Reserved

Reserved. Do not use.

INT_04(2)

MUXL[4:0]

00100

GPINT4/EXT_INT4

GP0 interrupt 4/External interrupt pin 4

INT_05(2)

MUXL[9:5]

00101

GPINT5/EXT_INT5

GP0 interrupt 5/External interrupt pin 5

INT_06(2)

MUXL[14:10]

00110

GPINT6/EXT_INT6

GP0 interrupt 6/External interrupt pin 6

INT_07(2)

MUXL[20:16]

00111

GPINT7/EXT_INT7

GP0 interrupt 7/External interrupt pin 7

INT_08(2)

MUXL[25:21]

01000

EDMA_INT

EDMA channel (0 through 63) interrupt

INT_09(2)

MUXL[30:26]

01001

EMU_DTDMA

EMU DTDMA

INT_10(2)

MUXH[4:0]

00011

SD_INTA

EMIFA SDRAM timer interrupt

INT_11(2)

MUXH[9:5]

01010

EMU_RTDXRX

EMU real-time data exchange (RTDX) receive

INT_12(2)

MUXH[14:10]

01011

EMU_RTDXTX

EMU RTDX transmit

INT_13(2)

MUXH[20:16]

00000

DSP_INT

HPI-to-DSP interrupt

INT_14(2)

MUXH[25:21]

00001

TINT0

Timer 0 interrupt

INT_15(2)

MUXH[30:26]

00010

TINT1

Timer 1 interrupt

–

01100

XINT0

McBSP0 transmit interrupt

–

01101

RINT0

McBSP0 receive interrupt

–

01110

Reserved

Reserved. Do not use.

–

01111

Reserved

Reserved. Do not use.

–

10000

GPINT0

GP0 interrupt 0

–

10001

Reserved

Reserved. Do not use.

–

10010

Reserved

Reserved. Do not use.

–

10011

TINT2

Timer 2 interrupt

–

10100

Reserved

Reserved. Do not use.

–

10101

Reserved

Reserved. Do not use.

–

10110

ICINT0

I2C0 interrupt

–

10111

Reserved

Reserved. Do not use.

–

11000

EMAC_MDIO_INT

EMAC/MDIO interrupt

–

11001

Reserved

Reserved. Do not use.

–

11010

VPINT1

VP1 interrupt

–

11011

VPINT2

VP2 interrupt

(1)

Interrupts INT_00 through INT_03 are non-maskable and fixed.Interrupts

(2)

INT_04 through INT_15 are programmable by modifying the binary selector values in the Interrupt Selector Control registers fields.

Table 5-7 shows the default interrupt sources for Interrupts INT_04 through INT_15. For more detailed information on interrupt sources

and selection, see the TMS320C6000 DSP Interrupt Selector Reference Guide (literature number SPRU646).

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