DS-AT25DF256-035 Rev.G

Page 25

2024-01-08

© 2024 Renesas Electronics

AT25DF256 Datasheet

11.2 Write Status Register

The Write Status Register command is used to modify the BPL bit and the BP0 bit of the Status Register. Before

the Write Status Register command can be issued, the Write Enable command must have been previously issued

to set the WEL bit in the Status Register to a logical 1.

To issue the Write Status Register command, the CS pin must first be asserted and the opcode of 01h must be

clocked into the device followed by one byte of data. The one byte of data consists of the BPL bit value, four don’t

care bits, the BP0 bit value, and two additional don’t care bits (see Table 8). Any additional data bytes sent to the

device are ignored. When the CS pin is deasserted, the BPL bit and the BP0 bit in the Status Register are

modified, and the WEL bit in the Status Register is reset to a logical 0. The value of BP0 and the state of the BPL

bit and the WP pin before the Write Status Register command was executed (the prior state of the BPL bit and the

state of the WP pin when the CS pin is deasserted) determines whether or not software protection is changed.

See Section 9.4, Protected States and the Write Protect Pin, for more details.

The complete one byte of data must be clocked into the device before the CS pin is deasserted, and the CS pin

must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device stops the operation,

the state of the BPL and BP0 bits does not change, memory protection status does not change, and the WEL bit

in the Status Register is reset to the logical 0 state.

If the WP pin is asserted, then the BPL bit can only be set to a logical 1. If an attempt is made to reset the BPL bit

to a logical 0 while the WP pin is asserted, then the Write Status Register Byte command is ignored, and the WEL

bit in the Status Register is reset to the logical 0 state. In order to reset the BPL bit to a logical 0, the WP pin must

be deasserted.

Figure 19. Write Status Register

Table 8. Write Status Register Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

BPL

XXX

X

BP0

XX

SCK

CS

SI

SO

MSB

23

1

0

0000000

67

5

4

OPC ODE

10 11

9

814 15

13

12

1

MSB

DX

X

X

X

DX

X

STATUS REGISTER IN

HIGH-IMPEDANCE