AT25DF256 datasheet(15/47 Pages) RENESAS

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DS-AT25DF256-035 Rev.G

Page 15

2024-01-08

AT25DF256 Datasheet

Figure 10. Byte Program

Figure 11. Page Program

8.2

Page Erase

Page Erase for 256 Kbit, 128 Pages [seven (7) page address bits, PA<6:0>] of 256 bytes each.

The Page Erase command can be used to individually erase any page in the main memory array. The Main

Memory Byte/Page Program command can be used at a later time.

To perform a Page Erase with the standard page size (256 bytes), an opcode of 81h must be clocked into the

device followed by three address bytes comprised of:

Byte 0: 81h the page erase command code

Byte 1: XXXX XXXX, PA8; which is eight (8) dummy bits

Byte 2: X, PA<6:0>; which is one dummy bit X, and seven (7) page address bits PA<6:0>

Byte 3: XXXX XXXX; which is eight (8) dummy bits

When a low-to-high transition occurs on the CS pin, the device erases the selected page (the erased state is a

logic 1). The erase operation is internally self-timed and takes place in a maximum time of tPE. During this time,

the RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase

properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.

SCK

MSB

00000010

410 11

812

37 38

31 32

29 30

OPCODE

HIGH-IMPEDANCE

AAAA

AAA

MSB

DDDDDDD

ADDRESS BITS A23-A0

DATA IN

SCK

MSB

00000010

839

37 38

31 32

29 30

OPCODE

HIGH-IMPEDANCE

AAA

MSB

DDDDDDD

ADDRESS BITS A23-A0

DATA IN BYTE 1

MSB

DDDDDDD

DATA IN BYTE n

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