AT25DF256 datasheet(23/47 Pages) RENESAS

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DS-AT25DF256-035 Rev.G

Page 23

2024-01-08

AT25DF256 Datasheet

11.1.2

EPE Bit

The EPE bit indicates whether the last erase or program operation completed successfully or not. If at least one

byte during the erase or program operation did not erase or program properly, then the EPE bit is set to the logical

1 state. The EPE bit is not set if an erase or program operation stops for any reason such as an attempt to erase

or program the memory when it is protected or if the WEL bit is not set prior to an erase or program operation. The

EPE bit is updated after every erase and program operation.

11.1.3

WPP Bit

The WPP bit can be read to determine if the WP pin has been asserted or not.

11.1.4

BP0 Bit

The BP0 bits provides feedback on the software protection status for the device. Also, the BP0 bit can also be

modified to change the state of the software protection to allow the entire memory array to be protected or

unprotected. When the BP0 bit is in the logical 0 state, then the entire memory array is unprotected. When the

BP0 bit is in the logical 1 state, then the entire memory array is protected against program and erase operations.

11.1.5

WEL Bit

The WEL bit indicates the current status of the internal Write Enable Latch. When the WEL bit is in the logical 0

state, the device does not accept any Byte/Page Program, erase, Program OTP Security Register, or Write Status

the WEL bit is reset to the logical 0 state automatically under the following conditions:

▪ Write Disable operation completes successfully

▪ Write Status Register operation completes successfully or stops

▪ Program OTP Security Register operation completes successfully or stops

▪ Byte/Page Program operation completes successfully or stops

▪ Block Erase operation completes successfully or stops

▪ Chip Erase operation completes successfully or stops

▪ Hold condition stops

If the WEL bit is in the logical 1 state, it is not reset to a logical 0 if an operation stops due to an incomplete or

unrecognized opcode being clocked into the device before the CS pin is deasserted. In order for the WEL bit to be

reset when an operation stops prematurely, the entire opcode for a Byte/Page Program, erase, Program OTP

Security Register, or Write Status Register command must have been clocked into the device.

11.1.6

RDY/BSY Bit

The RDY/BSY bit is used to determine whether or not an internal operation, such as a program or erase, is in

progress. To poll the RDY/BSY bit to detect the completion of a program or erase cycle, new Status Register data

must be continually clocked out of the device until the state of the RDY/BSY bit changes from a logical 1 to a

logical 0.Note that the RDY/BSY bit can be read either from Status Register Byte 1 or from Status Register Byte 2.

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