AT25DF256 datasheet(32/47 Pages) RENESAS

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DS-AT25DF256-035 Rev.G

Page 32

2024-01-08

AT25DF256 Datasheet

12.6 Exit Ultra-Deep Power-Down

To exit from the Ultra-Deep Power-Down mode, any one of three operations can be performed, which are

described in the following subsections.

12.6.1

Chip Select Toggle

The CS pin must simply be pulsed by asserting the CS pin, waiting the minimum necessary tCSLU time, and then

deasserting the CS pin again. To make simple software development easier, a dummy byte opcode can also be

entered while the CS pin is being pulsed; the dummy byte opcode is simply ignored by the device in this case.

After the CS pin has been deasserted, the device exits from the Ultra-Deep Power-Down mode and returns to the

standby mode within a maximum time of tXUDPD. If the CS pin is reasserted before the tXUDPD time has elapsed in

an attempt to start a new operation, then that operation is ignored, and nothing is done.

Figure 26. Exit Ultra-Deep Power-Down (Chip Select Toggle)

12.6.2

Chip Select Low

By asserting the CS pin, waiting the minimum necessary tXUDPD time, and then clocking in the first bit of the next

Opcode command cycle. If the first bit of the next command is clocked in before the tXUDPD time has elapsed, the

device exits Ultra-Deep Power-Down; however, the intended operation is ignored.

Figure 27. Exit Ultra-Deep Power-Down (Chip Select Low)

12.6.3

Power Cycling

The device can also exit the Ultra-Deep Power Mode by power cycling the device. The system must wait for the

device to return to the standby mode before normal command operations can be resumed. Upon recovery from

Ultra-Deep Power-Down, all internal registers are at there Power-On default state.

ICC

High-impedance

Ultra-Deep Power-Down Mode Current

Active Current

Standby Mode Current

tXUDPD

tCSLU

ICC

High-impedance

Ultra-Deep Power-Down Mode Current

Active Current

tXUDPD

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