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DM505LRBABF датащи(PDF) 81 Page - Texas Instruments |
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DM505LRBABF датащи(HTML) 81 Page - Texas Instruments |
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81 / 295 page ![]() 81 DM505 www.ti.com SPRS976E – NOVEMBER 2016 – REVISED MAY 2018 Submit Documentation Feedback Specifications Copyright © 2016–2018, Texas Instruments Incorporated Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted) (2) The voltage at the device ball should never be below the MIN voltage or above the MAX voltage for any amount of time. This requirement includes dynamic voltage events such as AC ripple, voltage transients, voltage dips, etc. (3) The DC voltage at the device ball should never be above the MAX DC voltage to avoid impact on device reliability and lifetime POH (Power-On-Hours). The MAX DC voltage is defined as the highest allowed DC regulated voltage, without transients, seen at the ball. (4) Logic functions and parameter values are not assured out of the range specified in the recommended operating conditions. 5.5 Operating Performance Points This section describes the operating conditions of the device. This section also contains the description of each OPP (operating performance point) for processor clocks and device core clocks. Table 5-1 describes the maximum supported frequency per speed grade for the devices. Table 5-1. Speed Grade Maximum Frequency Device Speed Maximum frequency (MHz) DSP EVE IPU ISS L3 DDR3/DDR3L DDR2 LPDDR2 ADC DM505xxR 745 667 212.8 212.8 266 532 (DDR-1066) 400 (DDR-800) 333 (DDR-667) 20 5.5.1 AVS Requirements Adaptive Voltage Scaling (AVS) is required on most of the vdd_* supplies as defined in Table 5-2. Table 5-2. AVS Requirements per vdd_* Supply Supply AVS Required? vdd Yes, for all OPPs vdd_dspeve Yes, for all OPPs 5.5.2 Voltage And Core Clock Specifications Table 5-3 shows the recommended OPP per voltage domain. Table 5-3. Voltage Domains Operating Performance Points DOMAIN CONDITION OPP_NOM OPP_OD OPP_HIGH MIN (2) NOM (1) MAX (2) MIN (2) NOM (1) MAX (2) MIN (2) NOM (1) MAX DC (3) MAX (2) VD_CORE (V) BOOT (Before AVS is enabled) (4) 1.02 1.06 1.11 Not Applicable Not Applicable After AVS is enabled (4) AVS Voltage (5) – 3.5% AVS Voltage (5) 1.11 Not Applicable Not Applicable VD_DSPEVE (V) BOOT (Before AVS is enabled) (4) 1.02 1.06 1.11 Not Applicable Not Applicable After AVS is enabled (4) AVS Voltage (5) – 3.5% AVS Voltage (5) 1.11 AVS Voltage (5) – 3.5% AVS Voltage (5) AVS Voltage (5) + 5% AVS Voltage (5) – 3.5% AVS Voltage (5) AVS Voltage (5) + 2% AVS Voltage (5) + 5% |
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