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DM505LRBABF датащи(PDF) 64 Page - Texas Instruments

номер детали DM505LRBABF
подробное описание детали  DM505 SoC for Vision Analytics 15mm Package (ABF) Silicon Revision 2.0
PDF  295 Pages
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DM505LRBABF датащи(HTML) 64 Page - Texas Instruments

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Terminal Configuration and Functions
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64
DM505
SPRS976E – NOVEMBER 2016 – REVISED MAY 2018
www.ti.com
4.4
Pin Multiplexing
Table 4-28 describes the device pin multiplexing (no characteristics are provided in this table).
NOTE
Table 4-28, Pin Multiplexing doesn't take into account subsystem multiplexing signals. Subsystem multiplexing signals are described in
Section 4.3, Signal Descriptions.
NOTE
For more information, see the Control Module / Control Module Functional Description / Pad Configuration Registers section of the Device
TRM.
NOTE
Configuring two pins to the same input signal is not supported as it can yield unexpected results. This can be easily prevented with the
proper software configuration (Hi-Z mode is not an input signal).
NOTE
When a pad is set into a pin multiplexing mode which is not defined by pin multiplexing, that pad’s behavior is undefined. This should be
avoided.
NOTE
In some cases Table 4-28 may present more than one signal per muxmode for the same ball. First signal in the list is the dominant
function as selected via CTRL_CORE_PAD_* register.
All other signals are virtual functions that present alternate multiplexing options. This virtual functions are controlled via
CTRL_CORE_ALT_SELECT_MUX or CTRL_CORE_VIP_MUX_SELECT register. For more information on how to use this options,
please refer to Device TRM, Chapter Control Module, Section Pad Configuration Registers.
CAUTION
The IO timings provided in Section 5.9, Timing Requirements and Switching Characteristics are only valid if signals
within a single IOSET are used. The IOSETs are defined in the corresponding tables.



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