UCD7232

www.ti.com

SLUSAH3

– MAY 2011

Low-side FET selection is driven primarily by RDS(ON). The lower the value, the higher the efficiency. Lower

RDS(ON) requires a larger die size, which increases total gate charge and device cost. For a given RDS(ON) value,

the part with the lowest Qg is likely to be the best choice. At higher input voltages and narrower duty cycles, the

low-side FET is conducting current for the majority of switching cycle. A thermally enhanced package is a must.

The continuous current rating of the FET should at least be equal to the current rating of the power stage.

The TI CSD16401Q5 is used as the low-side FET (Q2) in this design. It has an RDS(ON) of 1.5mΩ, with only 21nC

of Qg at 4.5V. It has more than enough current handling capacity. Its 25V minimum BVDSS rating beats our

minimum voltage criteria. It comes in the same 5

× 6mm package as Q1.

In rare instances, the addition of a series gate resistor can be of some benefit when dealing with high amplitude

ringing. Usually, however, the addition of series gate resistance increases switching losses and increases the

risk of cross-conduction between the high-side and low-side FETs. A tight, low stray inductance PCB layout, or a

snubber network are the preferred methods for reducing ringing. Resistors R9 and R10 are shown as

placeholders in Figure 7. They can be added to the PCB layout to allow for the possibility that series gate

resistance may be needed. In most cases they are not required and can be considered optional. If they are

added to the design, the default value of 0

Ω should initially be used.

SW NODE CLAMP

At higher output currents, the switching node can momentarily swing more than a 1V below ground. This

condition can interfere with the proper operation of the chip. To prevent the SW pin from being subjected to

excessive negative voltage swings, a Schottky diode clamp and current limiting resistor, D1 and R11, are

inserted between the actual switching node and the SW pin (pin 20). Diode D1 should be a power Schottky

device rated at a minimum of 0.5A of current and at least 30V breakdown voltage. The device shown in Figure 7

is a 0.5A, 40V device in a SOD123 package. The diode should be placed as close as possible to the UCD7232

and be connected between the SW pin and PGND pin by short, wide traces. Small-signal Schottky diodes should

not be used. Their forward voltage drop at higher currents is too high to provide effective clamping. Use a value

of 1

Ω for R11. Larger values will interfere with the anti-cross conduction logic used to control the turn-on and

turn-off of the high-side FET, Q1.

SNUBBER NETWORK

Energy stored in the parasitic inductance in the source and drain leads of the power FETs is released when the

FETs abruptly turn on and off. The parasitic inductance interacts with the output capacitance COSS) of the FETs

to form a resonant circuit. The end result is high amplitude, high frequency ringing on the switching node that is

most prominent just after the high-side FET is turned on. The frequency of the ringing is commonly in the

100MHz range. Its peak amplitude can be as much as twice the input voltage. If nothing is done to damp the

ringing, it can cause avalanche breakdown of the low-side FET, increase radiated EMI levels, and, most

important for this discussion, interfere with the detection of an over-current condition. When left undamped, the

ringing on the switching node can take several hundreds of nanoseconds to die out.

A simple series RC network connected to the switching node is commonly used to dampen or

“snub” the ringing.

The capacitor couples the high frequency content to the resistor, and the resistor dissipates the energy. With the

correct values, the ringing can be made to decay to negligible levels in 100ns or less. C5 (2200pF) and R8

(3.01

Ω) perform this function in the example circuit. R8 must be capable of dissipating several hundred milliwatts

of power. The amount of power dissipated in R8 is proportional to the switching frequency and the value of C5.

With the values shown, R8 will dissipate approximately 125mW at 500kHz. This will double if the switching

frequency is increased to 1MHz. It is recommended that a 500mW rated resistor be used for R8. The optimum

values of the snubber R and C are device and layout dependant. Some experimentation may be needed to

achieve the optimum trade-off between damping time and power lost in the damping resistor. In most cases, the

value of R is between 1

Ω and 10Ω, and C is between 1000pF and 4700pF. Higher values of C cause more

current to flow in R which increases the power dissipated.

Copyright

© 2011, Texas Instruments Incorporated

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