SPSB081 datasheet(11/137 Pages) STMICROELECTRONICS

11 / 137 page

1. Non-overlapping.

2. The values quoted are for PCB 129 mm x 60 mm x 1.6 mm, FR4, four layers; Cu thickness 0.070 mm (outer layers). Cu

thickness 0.035 mm (inner layers), thermal vias separation 1.2 mm, thermal via diameter 0.3 mm ±0.08 mm, Cu thickness

on vias 0.025 mm, footprint dimension 3.5 mm x 3.5 mm.

All parameters are guaranteed in the temperature range from -40 °C to 150 °C (unless otherwise specified); the

device is still operative and functional at higher temperatures (up to 175 °C).

Parameters limits at higher temperatures than 150 °C may change with respect to what is specified as per the

standard temperature range.

Device functionality at high temperature is guaranteed by characterization.

SPSB081 embeds a multitude of junctions housed in a relatively small piece of silicon. The devices contain,

among all the described features, four high-sides, two voltage regulators (one of which can work as voltage

tracker). For this reason, using the thermal impedance of a single junction (that is, voltage regulator or major

power dissipation contributor) does not allow to predict thermal behavior of the whole device and therefore it is

not possible to assess if a device is thermally suitable for a given activation profile and loads characteristics.

Some representative and realistic worst-case thermal profiles are described in the below paragraph. The following

measurement methods can be easily implemented, by the final user, for a specific activation profile.

Activation profile battery voltage: 16 V, ambient temperature starts at 85 °C.

DC activation:

•

V1 (3.3 V) charged with 70 mA; RDSON = 470 Ω (DC activation)

•

V2 (3.3 V) charged with 50 mA; RDSON = 680 Ω (DC activation)

•

OUT1: ILOAD = 50 mA; RDSON = 330 Ω (DC activation)

•

OUT2: ILOAD = 50 mA; RDSON = 330 Ω (DC activation)

•

OUT3: ILOAD = 50 mA; RDSON = 330 Ω (DC activation)

•

OUT4: ILOAD = 50 mA; RDSON = 330 Ω (DC activation)

•

CAN-LIN not relevant

Test execution: once thermal equilibrium is reached with all DC load active, the activation sequence is applied.

The device operates always without triggering the thermal warning threshold.

Figure 5. QFN32L (5.0x5.0x1.0 mm) 4-layers

Note:

PCB 129 mm x 60 mm x 1.6 mm, FR4, four layers; Cu thickness 0.070 mm (outer layers). Cu thickness 0.035

mm (inner layers), thermal vias separation 1.2 mm, thermal via diameter 0.3 mm ±0.08 mm, Cu thickness on

vias 0.025 mm, footprint dimension 3.5 mm x 3.5 mm.

SPSB081

Temperature ranges and thermal data

DS14048 - Rev 3

page 11/137

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