SPSB081 datasheet(46/137 Pages) STMICROELECTRONICS

46 / 137 page

Figure 29. SDO frame

4.2.2.6

Global status byte (GSB)

The bits (Bit0 to Bit4) represent a logical OR combination of bits located in the status registers. Therefore, no

direct read & clear can be performed on these bits inside the GSB.

Table 14. Global status byte

Bit 31

Bit 30

Bit 29

Bit 28

Bit 27

Bit 26

Bit 25

Bit 24

GSBN

RSTB

SPIE

PLE

Global status bit not (GSBN)

The GSBN is a logically NOR combination of bit 24 to bit 30. This bit can also be used as global status flag

without starting a complete communication frame as it is present directly after pulling CSN low.

Reset bit (RSTB)

The RSTB indicates a device reset. In case this bit is set, specific internal control registers are set to default and

kept in that state until the bit is cleared.

The RSTB bit is cleared after a read and clear of all the specific bits in the status registers, which caused the

reset event.

SPI error (SPIE)

The SPIE is a logical OR combination of errors related to a wrong SPI communication.

Physical layer error (PLE)

The PLE is a logical OR combination of errors related to the LIN and CAN FD transceivers.

Functional error (FE)

The FE is a logical OR combination of errors coming from functional blocks (for example, high-side over current).

Device error (DE)

The DE is a logical OR combination of errors related to device specific blocks (for example, VS over voltage, over

temperature.

Global warning (GW)

The GW is a logical OR combination of warning flags (for example, thermal warning).

Fail-safe (FS)

The FS bit indicates that the device was forced into a safe state due to mistreatment or fundamental internal

errors (for example, watchdog failure, voltage regulator failure).

SPSB081

Signal description

DS14048 - Rev 3

page 46/137

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