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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADF4382ABCCZ датащи(PDF) 8 Page - Analog Devices |
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ADF4382ABCCZ датащи(HTML) 8 Page - Analog Devices |
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8 / 82 page  Data Sheet ADF4382A SPECIFICATIONS analog.com Rev. A | 8 of 82 SERIAL INTERFACE TIMING CHARACTERISTICS V3.3V_1 = 3.3 V, V3.3V_2 = 3.15 V to 3.45 V, V5V_VCO = V5V_CP = V5V_CAL = 4.75 V to 5.25 V, all voltages are with respect to GND, and TA = TMIN to TMAX, unless otherwise noted. Table 1. Serial Interface Timing Characteristics Parameter Symbol Min Typ Max Unit Test Conditions/Comments SERIAL INTERFACE (CSB, SCLK, SDIO, SDO) See Figure 2, Figure 3, and Figure 4 SCLK Frequency fSCLK 75 MHz SCLK Pulse Width High tHIGH 6 ns SCLK Pulse Width Low tLOW 6 ns SDIO Setup Time tDS 4 ns SDIO Hold Time tDH 2 ns SCLK Fall Edge to SDIO Valid Prop Delay tACCESS_SDIO 6 ns SCLK Fall Edge to SDO Valid Prop Delay tACCESS_SDO 6 ns CSB Rising Edge to SDIO High-Z tZ 6 ns CSB Falling Edge to SCLK Rise Setup Time tS 2 ns SCLK Rising Edge to CSB Rise Hold Time tH 3 ns Serial Interface Timing Diagrams Figure 2. Write Timing Diagram Figure 3. 3-Wire Read Timing Diagram (SDO_ACTIVE = 0) Figure 4. 4-Wire Read Timing Diagram (SDO_ACTIVE = 1) |
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