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LSM6DSV80X датащи(PDF) 28 Page - STMicroelectronics |
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LSM6DSV80X датащи(HTML) 28 Page - STMicroelectronics |
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28 / 181 page ![]() 5.2 MIPI I3C® interface 5.2.1 MIPI I3C® target interface The LSM6DSV80X interface includes a MIPI I3C® SDR-only target interface (compliant with release 1.1 of the specification) with MIPI I3C® SDR embedded features: • CCC command • Direct CCC communication (SET and GET) • Broadcast CCC communication • Private communications • Private read and write for single byte • Multiple read and write • In-band interrupt request • Target reset pattern • Group address • Full range Vdd_IO support • Asynchronous modes 0 and 1 • Synchronous mode • Error detection and recovery methods (S0-S6) In order to disable the MIPI I3C® block, I2C_I3C_disable = 1 must be written in IF_CFG (03h). LSM6DSV80X Digital interfaces DS14764 - Rev 1 page 28/181 |
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