MPC8280 datasheet(253/1386 Pages) FREESCALE

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External Signals

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

6-11

L_A17

PCI_IRDY

CKSTOP_OUT

Local bus address 17—Local bus address bit 17 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI initiator ready—PCI initiator ready input/output pin. This pin is driven by the MPC8280 when

its PCI interface is the initiator of a PCI transfer. Assertion of this pin indicates that the PCI initiator

is ready to send or accept a data beat.

Checkstop output—(Output) Assertion of CKSTOP_OUT indicates the core is in checkstop

mode.

L_A18

PCI_STOP

Local bus address 18—Local bus address bit 18 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI stop—PCI stop input/output pin. This pin is driven by the MPC8280 when its PCI interface is

the target of a PCI transfer. Assertion of this pin indicates that the PCI target is requesting the

master to stop the current PCI transfer.

L_A19

PCI_DEVSEL

Local bus address 19—Local bus address bit 19 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI device select—PCI device select input/output pin. This pin is driven by the MPC8280 when

its PCI interface has decoded its own address as the target of the current PCI transfer. As an

input, PCI_DEVSEL indicates whether any device on the PCI bus has been selected.

L_A20

PCI_IDSEL

Local bus address 20—Local bus address bit 20 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI initialization device select—(Input) Used to select the MPC8280’s PCI interface during a PCI

configuration cycle.

L_A21

PCI_PERR

Local bus address 21—Local bus address bit 21 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI parity error—PCI data parity error input/output pin. Assertion of this pin indicates that a data

parity error was detected during a PCI transfer (except for a special cycle).

L_A22

PCI_SERR

Local bus address 22—Local bus address bit 22 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI system error—PCI system error input/output pin. Assertion of this pin indicates that a PCI

system error was detected during a PCI transfer. The PCI system error is for reporting address

parity errors, data parity errors on a special cycle command, or other catastrophic system errors.

L_A23

PCI_REQ0

Local bus address 23—Local bus address bit 23 output pin. In the local address bus bit 14 is most

significant and bit 31 is least significant.

PCI arbiter request 0—PCI request 0 input/output pin. When the MPC8280’s internal PCI arbiter

is used, this is an input pin. In this mode assertion of this pin indicates that an external PCI device

is requesting the PCI bus. When an external PCI arbiter is used, this is an output pin. In this mode

assertion of this pin indicates that the MPC8280’s PCI interface is requesting the PCI bus.

Table 6-1. External Signals (continued)

Signal

Description

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