MPC8280 datasheet(225/1386 Pages) FREESCALE

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

5-1

Chapter 5

Reset

The MPC8280 has several inputs to the reset logic:

•

Power-on reset (PORESET)

•

External hard reset (HRESET)

•

External soft reset (SRESET)

•

Software watchdog reset

•

Bus monitor reset

•

Checkstop reset

•

JTAG reset

All of these reset sources are fed into the reset controller and, depending on the source of the reset, different

actions are taken. The reset status register, described in Section 5.2, “Reset Status Register (RSR),”

indicates the last sources to cause a reset.

5.1

Reset Causes

Table 5-1 describes reset causes.

Table 5-1. Reset Causes

Name

Description

Power-on reset

(PORESET)

Input pin. Asserting this pin initiates the power-on reset flow that resets all the chip and configures

various attributes of the chip including its clock mode.

Hard reset

(HRESET)

This is a bidirectional I/O pin. The MPC8280 can detect an external assertion of HRESET only if it

occurs while the MPC8280 is not asserting reset. During HRESET, SRESET is asserted. HRESET

is an open-collector pin.

Soft reset

(SRESET)

Bidirectional I/O pin. The MPC8280 can only detect an external assertion of SRESET if it occurs

while the MPC8280 is not asserting reset. SRESET is an open-drain pin.

Software

watchdog reset

After the MPC8280’s watchdog counts to zero, a software watchdog reset is signaled. The enabled

software watchdog event then generates an internal hard reset sequence.

Bus monitor

reset

After the MPC8280’s bus monitor counts to zero, a bus monitor reset is asserted. The enabled bus

monitor event then generates an internal hard reset sequence.

Checkstop reset

If the core enters checkstop state and the checkstop reset is enabled (RMR[CSRE] = 1), checkstop

reset is asserted. The enabled checkstop event then generates an internal hard reset sequence.

JTAG reset

When JTAG logic asserts the JTAG soft reset signal, an internal soft reset sequence is generated.

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