HT45RM03 datasheet(29/54 Pages) HOLTEK

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HT45RM03

Rev. 1.10

February 16, 2007

Bit No.

Label

Function

0~3

COF0~COF3 Comparator input offset voltage cancellation control bits

CRS

Comparator input offset voltage cancellation reference selection bit

1/0: select CVINP/CVINN as the reference input

COFM

Input offset voltage cancellation mode and comparator mode selection

1/0: input offset voltage cancellation mode/comparator mode

CMPOP

Comparator output; positive logic. This bit is read only.

CMPEN

Comparator enable/disable (1/0)

CMPC Register (Comparator Control Register)

CMPEN

COUTEN

PA1, PA2, PA3

PA1, PA2, PA3 is GPIO

PA1, PA2 is Comparator input pin and PA3 is GPIO.

PA1, PA2 is Comparator input pin and PA3 is Comparator output pin.

PA3 can read the Comparator output status.

The Comparator enable/disable register, Comparator output pin enable/disable register and Comparator output flag

are shown below.

COUTEN

PA3/COUT selection

0: PA3/COUT is as a GPIO pin

1: PA3/COUT is Comparator output, and the status of COUT can be read by reading the PA3 register.

The Comparator can be used for stopping the PWM by PWWSP0 and PWMSP1 register, which are shown below. The

stopping PWM is used to clear the PWMCTRL bit to

²0².

PWMSP0

Stopping the PWMand PWM using hardware selection. The stopping PWM method is to clear PWMCTRL

bit to

²0² by hardware.

00: PWM module output can be stop by software control only

01: PWM module output can be stop by COUT falling edge

10: PWM module output can be stop by INT1 interrupt

11: PWM module output can be stop by COUT falling edge or by INT1 interrupt

PWMSP1

OPA (Operation Amplifier)

There is one OPA in the device. This OPA can be used

for amplifier by user requirement. The OPAEN bits is

used as the enable or disable bits, if the OPAEN is

cleared to

²0², the OPA is disabled and power off to save

power consumption, the PB2/AN2/OPOUT, PB3/AN3/

OPVINN, PA0/OPVINP are all GPIO pins, if the OPAEN

is set to

²1², the OPA is enabled, the PB3/AN3/OPVINN

and PA0/OPVINP are OPA inverting and non-inverting

input pins, PB2/AN2/OPOUT is a OPA output pin, PB2,

PB3, PA0 output and pull-high resistor are disabled.

The OPA can be disabled or enabled by software con-

trol.

The OPVINP, OPVINN and OPOUT are pin-shared with

PA0, PB3/AN3 and PB2/AN2 respectively. Once the

OPA function is used, the internal registers related to

PA0, PB3 and PB2 cannot be used, and the I/O function

and pull-high resistor are disabled automatically. Soft-

ware instructions determine the OPA function to be

used.

A R S

A O F M

S 1

O N

O F F

O N

S 2

O N

O F F

S 3

O F F

O N

O F F

O N

O P A O P

A O F 0 ~ A O F 3

O P A E N

S 1

S 2

S 3

P A 0 / O P V I N P

P B 3 / A N 3 / O P V I N N

P B 2 / A N 2 / O P O U T

Operational Amplifier Block Diagram

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