HT45RM03 datasheet(7/54 Pages) HOLTEK

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HT45RM03

Rev. 1.10

February 16, 2007

Program Memory

- ROM

The program memory is used to store the program in-

structions which are to be executed. It also contains

data, table, and interrupt entries, and is organized into

4096

´15 bits, addressed by the program counter and ta-

ble pointer.

Certain locations in the program memory are reserved

for special usage:

· Location 000H

These area is reserved for program initialization. After

chip reset, the program always begins execution at lo-

cation 000H.

· Location 004H

These area is reserved for the Comparator interrupt

service program. If the Comparator output pin is acti-

vated, and if the interrupt is enable and the stack is not

full, the program begins execution at location 004H.

· Location 008H

These area is reserved for the external interrupt 0 ser-

vice program. If the INT0A, INT0B or INT0C input pin

is activated, the interrupt is enabled and the stack is

not full, the program begins execution at location

008H.

· Location 00CH

These area is reserved for the external interrupt 1 ser-

vice program. If the INT1 input pin is activated, the in-

terrupt is enabled and the stack is not full, the program

begins execution at location 00CH.

· Location 010H

These area is reserved for the PWM period interrupt

service program. If a PWM period interrupt results

from a PWM counter overflow, and if the interrupt is

enabled and the stack is not full, the program begins

execution at location 010H.

· Location 014H

These area is reserved for the Timer/Event Counter 0

interrupt service program. If a timer interrupt results

from a Timer/Event Counter 0 overflow, and if the in-

terrupt is enabled and the stack is not full, the program

begins execution at location 014H.

· Location 018H

These area is reserved for the Timer/Event Counter 1

interrupt service program. If a timer interrupt results

from a Timer/Event Counter 1 overflow, and if the in-

terrupt is enabled and the stack is not full, the program

begins execution at location 018H.

· Table location

Any location in the PROM space can be used as

look-up tables. The instructions

²TABRDC [m]² (the

current page, 1 page=256 words) and

²TABRDL [m]²

(the last page) transfer the contents of the lower-order

byte to the specified data memory, and the

higher-order byte to TBLH (08H). Only the destination

of the lower-order byte in the table is well-defined, the

other bits of the table word are transferred to the lower

portion of TBLH, and the remaining 1 bit is read as

²0².

The Table Higher-order byte register (TBLH) is read

only. The table pointer (TBLP) is a read/write register

(07H), which indicates the table location. Before ac-

cessing the table, the location must be placed in

TBLP. The TBLH is read only and cannot be restored.

If the main routine and the ISR (Interrupt Service Rou-

tine) both employ the table read instruction, the con-

tents of the TBLH in the main routine are likely to be

changed by the table read instruction used in the ISR.

Errors can occur. In other words, using the table read

instruction in the main routine and the ISR simulta-

neously should be avoided. However, if the table read

instruction has to be applied in both the main routine

and the ISR, the interrupt is supposed to be disabled

prior to the table read instruction. It will not be enabled

until the TBLH has been backed up. All table related

instructions require two cycles to complete the opera-

tion. These areas may function as normal program

memory depending upon the requirements.

F F F H

n F F H

P r o g r a m

M e m o r y

D e v i c e I n i t i a l i z a t i o n P r o g r a m

L o o k - u p T a b l e ( 2 5 6 w o r d s )

N o t e : n r a n g e s f r o m 0 t o F

n 0 0 H

0 1 0 H

0 0 C H

0 0 8 H

0 0 4 H

0 0 0 H

1 5 b i t s

C o m p a r a t o r I n t e r r u p t

E x t e r n a l I n t e r r u p t 0

E x t e r n a l I n t e r r u p t 1

P W M P e r i o d I n t e r r u p t

T i m e r / E v e n t C o u n t e r 0 O v e r f l o w

T i m e r / E v e n t C o u n t e r 1 O v e r f l o w

0 1 4 H

0 1 8 H

Program Memory

Instruction

Table Location

*11

*10

TABRDC [m]

P11

P10

TABRDL [m]

Table Location

Note:

*11~*0: Table location bits

P11~P8: Current program counter bits

@7~@0: Table pointer bits

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