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HT45RM03 датащи(PDF) 20 Page - Holtek Semiconductor Inc

номер детали HT45RM03
подробное описание детали  Brushless DC Motor Type 8-Bit OTP MCU
PDF  54 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
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HT45RM03 датащи(HTML) 20 Page - Holtek Semiconductor Inc

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HT45RM03
Rev. 1.10
20
February 16, 2007
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PWMH
D9
D8
D7
D6
D5
D4
D3
D2
PWML
¾¾¾¾¾¾
D0
D1
PWMH (1AH), PWML (1BH) Register
A (9+1) bits mode PWM cycle is divided into two modulation cycles (modulation cycle 0~modulation cycle 1). Each
modulation cycle has 512 PWM input clock period. In a (9+1) bit PWM function, the contents of the PWM register is di-
vided into two groups. Group 1 of the PWM registers are denoted by DC which are the values of PWMH.7~PWMH.0
and PWML.1 (9 bit from PWMH~PWML.1). The group 2 is denoted by AC which is the value of PWML.0. In a (9+1) bits
mode PWM cycle, the duty cycle of each modulation cycle is shown in the table.
Parameter
AC0~AC1
Duty Cycle
Modulation Cycle I (i=0~1)
i<AC
(DC+1)/512
i
³AC
DC/512
A (8+2) bits mode PWM cycle is divided into four modulation cycles (modulation cycle 0~modulation cycle 3). Each
modulation cycle has 256 PWM input clock period. In a (8+2) bit PWM function, the contents of the PWM register is di-
vided into two groups. Group 1 of the PWM register is denoted by DC which is the value of PWMH.7~PWMH.0. The
group 2 is denoted by AC which is the value of PWML.1~PWML.0 (PWML). In a (8+2) bits mode PWM cycle, the duty
cycle of each modulation cycle is shown in the table.
Parameter
AC0~AC3
Duty Cycle
Modulation Cycle I (i=0~3)
i<AC
(DC+1)/256
i
³AC
DC/256
A (7+3) bits mode PWM cycle is divided into eight modulation cycles (modulation cycle 0~modulation cycle 7). Each
modulation cycle has 128 PWM input clock period. In a (7+3) bit PWM function, the contents of the PWM register is di-
vided into two groups. Group 1 of the PWM register is denoted by DC which is the value of PWMH.7~PWMH.1. The
group 2 is denoted by AC which are the value of PWMH.0 and PWML.1~PWML.0 (PWMH.0~PWML.0). In a (7+3) bits
mode PWM cycle, the duty cycle of each modulation cycle is shown in the table.
Parameter
AC0~AC7
Duty Cycle
Modulation Cycle I (i=0~7)
i<AC
(DC+1)/128
i
³AC
DC/128
The modulation frequency, cycle frequency and cycle duty of the PWM output signal are summarized in the following
table.
PWM Modulation Frequency
PWM Cycle Frequency
PWM Cycle Duty
fPWM/1024 for standard 10-bits mode
fPWM/512 for (9+1) bits mode
fPWM/256 for (8+2) bits mode
fPWM/128 for (7+3) bits mode
fPWM/1024
[PWM]/1024
f P W M / 2
P W M
[ P W M ] = 1 0 0
1 0 0 / 1 0 2 4
1 0 0 / 1 0 2 4
1 0 0 / 1 0 2 4
P W M M o d u l a t i o n P e r i o d : 1 0 2 4 / f P W M
P W M F u l l C y c l e : 1 0 2 4 / f P W M
Standard 10 Bit PWM Mode



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