HT45RM03 datasheet(26/54 Pages) HOLTEK

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HT45RM03

Rev. 1.10

February 16, 2007

A/D Converter

The 8 channels and 9-bit resolution A/D converter are implemented in this microcontroller. The reference voltage is

VDD. The A/D converter contains 4 special registers which are; ADRL (20H), ADRH (21H), ADCR (22H) and ACSR

(23H). The ADRH and ADRL are A/D result register higher-order byte and lower-order byte and are read-only. After the

A/D conversion is completed, the ADRH and ADRL should be read to get the conversion result data. The ADCR is an

A/D converter control register, which defines the A/D channel number, analog channel select, start A/D conversion con-

trol bit and the end of A/D conversion flag. If the users want to start an A/D conversion, define PB configuration, select

the converted analog channel, and give START bit a raising edge and falling edge (0

®1®0). At the end of A/D conver-

sion, the EOCB bit is cleared and an A/D converter interrupt occurs (if the A/D converter interrupt is enabled). The

ACSR is A/D clock setting register, which is used to select the A/D clock source.

The A/D converter control register is used to control the A/D converter. The bit2~bit0 of the ADCR are used to select an

analog input channel. There are a total of eight channels to select. The bit5~bit3 of the ADCR are used to set PB config-

urations. PB can be an analog input or as digital I/O line decided by these 3 bits. Once a PB line is selected as an ana-

log input, the I/O functions and pull-high resistor of this I/O line are disabled and the A/D converter circuit is power on.

The EOCB bit (bit6 of the ADCR) is end of A/D conversion flag. Check this bit to know when A/D conversion is com-

pleted. The START bit of the ADCR is used to begin the conversion of the A/D converter. Giving START bit a rising edge

and falling edge means that the A/D conversion has started. In order to ensure the A/D conversion is completed, the

START should remain at

²0² until the EOCB is cleared to ²0² (end of A/D conversion).

Bit No.

Label

Function

ADCS0

ADCS1

Selects the A/D converter clock source

00= system clock/2

01= system clock/8

10= system clock/32

11= undefined

2~7

Unused bit, read as

²0²

ACSR (23H) Register

Bit No.

Label

Function

ACS0

ACS1

ACS2

Defines the analog channel select.

PCR0

PCR1

PCR2

Defines the port B configuration select. If PCR0, PCR1 and PCR2 are all 0, the ADC circuit is

power off to reduce power consumption

EOCB

Indicates end of A/D conversion. (0 = end of A/D conversion)

Each time bits 3~5 change state the A/D should be initialized by issuing a START signal, oth-

erwise the EOCB flag may have an undefined condition. See

²Important note for A/D initializa-

tion

².

START

Starts the A/D conversion. (0

®1®0= start; 0®1= Reset A/D converter and set EOCB to ²1²)

ADCR (22H) Register

PCR2

PCR1

PCR0

76543

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

AN0

PB7

PB6

PB5

PB4

PB3

PB2

AN1

AN0

PB7

PB6

PB5

PB4

PB3

AN2

AN1

AN0

PB7

PB6

PB5

PB4

AN3

AN2

AN1

AN0

PB7

PB6

PB5

AN4

AN3

AN2

AN1

AN0

PB7

PB6

AN5

AN4

AN3

AN2

AN1

AN0

AN7

AN6

AN5

AN4

AN3

AN2

AN1

AN0

Port B Configuration

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