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DSP56300 датащи(PDF) 96 Page - Freescale Semiconductor, Inc

номер детали DSP56300
подробное описание детали  Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
PDF  108 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56300 датащи(HTML) 96 Page - Freescale Semiconductor, Inc

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C-4
Viterbi Decoder Implementation
24-Bit Algorithm Program Listing
Example C-1
24-bit Algorithm Program Listing
OPT
mex
;****************56600**24 bit VITERBI DECODER*****************************
;
THIS ROUTINE IMPLEMENTS A CONVOLUTIONAL DECODER USING THE VITERBI ALG.
;
IT IS OPTIMIZED FOR SPEED, WHICH MEANS THAT EVERY ALU REGISTER
;
AND ALL OF THE R REGISTERS ARE USED.
A SIGNIFICANT AMOUNT OF
;
THESE CAN BE FREED BY STORING AND REUSING REGISTERS BETWEEN THE
;
FINDMETRICS ROUTINES AND THE ACS,ACSFlush ROUTINES.
;
INPUT is at INDATA: real in x imag in y.
OUTPUT begins at y:DECOUT
;
GLOBAL REGISTER USE: a,b,x,y,r012345,n025,m245(are set to a modulo mode)
;*************************************************************************
;
;*****************BRANCH METRIC MACRO*************************************
;
FUNCTION: Input data and generate branch metrics.
This function
;
subtracts the path metric for state 0 from all branch metrics
;
to provide autonormaliztion. For this decoder, the metric is a scaled
;
sum or difference of the real and imag inputs.
;
INPUTS:
;
r2 should point to the beginning of the branch metric table
;
r5 should point to the latest path metric for state 0
;
r1 should point to the next input XY data pair
;
OUTPUTS:
;
Branch metrics are stored at BRX in XY memory
;
REGISTERS USED:
;
a,b,x01,y01,r1,r2,r5, r5 unchanged,r2 unchanged (modulo req'd)
;****************************************************************
;
FindMetricsmacro
move
x:(r5),a
;st. metric scaling, read last st. 0
neg
a
l:(r1)+,y ;negate metric|grab dec input
move
#-16,x1
;sign for real component, upper br.
mac
x1,y1,a
a,b
move
y1,x0
;cp metric to b|mv real in to x0
mac
x1,y0,a
a,y1
;y1 gets 0x partial branch
subl
a,b
b,x0
;a has 00 br., b has 11 branch, save st.
tfr
y1,a
a,y1
;swap 0x and 00 to compute 01 branch
mac
-x1,y0,a
b,x1
;a gets 01 br,x1 gets cp of 11 br.
tfr
x0,b
b,y0
;swap st metric,11 branch to y0
subl
a,b
y1,x0
;b gets 10 br, x0 has copy of 00 br.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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