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A-4

Viterbi Decoder Implementation

Basic Algorithm Program Listing

Example A-1

Basic 16-Bit Implementation of a Viterbi Decoder

OPT

mex

;***********************VITERBI DECODER***********************************

;

THIS ROUTINE IMPLEMENTS A CONVOLUTIONAL DECODER USING THE VITERBI ALG.

;

IT IS OPTIMIZED FOR SPEED, WHICH MEANS THAT EVERY ALU REGISTER

;

AND ALL OF THE R REGISTERS ARE USED.

A SIGNIFICANT AMOUNT OF

;

THESE CAN BE FREED BY STORING AND REUSING REGISTERS BETWEEN THE

;

FINDMETRICS ROUTINES AND THE ACS,ACSFlush ROUTINES.

;

INPUT is in INDATA real in x imag in y.

OUTPUT begins at y:DECOUT

;*****************BRANCH METRIC MACRO*************************************

;

FUNCTION: Input data and generate branch metrics.

;

For this decoder, the metric is a scaled

;

sum or difference of the real and imag inputs.

;

INPUTS:

;

r2 should point to the beginning of the branch metric table

;

r5 should point to the latest path metric for state 0

;

r1 should point to the next input XY data pair

;

OUTPUTS:

;

Branch metrics are stored at BRX in XY memory

;

REGISTERS USED:

;

a,b,x01,y01,r1,r2,n2, r2 unchanged (modulo req'd)

;****************************************************************

FindMetrics macro

move

l:(r1)+,y

;grab dec input

move

#-16,x1

;sign for real component, 0 sent.

mpy

x1,y1,a

;a has 0x partial branch

move

#BRY+3,r2

;storage for generated branch metrics

mac

x1,y0,a

a,b

;a gets 00 branch

mac

-x1,y0,b

;b has 01 branch

;

neg

a,x1

a,y:(r2)+n2 ;mv 00 to x1,11 to a, st 00 in location 3

neg

b,x0

b,y:(r2)+n2 ;mv 01 to x0,10 to b, st 01 in location 6

;*****************************************************************************

;

AT this point X1 has 00, X0 has 01,

;

A1 has 11, B1 has 10, needed for quick storage in Y memory

;*****************************************************************************

move

x1,y:(r2)+n2

;store 00 in location 9

move

x0,y:(r2)+n2

;store 01 in location 12

move

b,y:(r2)+n2

;store 10 in location 15

move

b,y:(r2)+n2

;store 10 in location 2

move

b,y:(r2)+n2

;store 10 in location 5

move

b,y:(r2)+n2

;store 10 in location 8

move

x0,y:(r2)+n2

;store 01 in location 11

move

x1,y:(r2)+n2

;store 00 in location 14

move

x0,y:(r2)+n2

;store 01 in location 1

move

x1,y:(r2)+n2

;store 00 in location 4

move

a,y:(r2)+n2

;store 11 in location 7

move

a,y:(r2)+n2

;store 11 in location 10

move

a,y:(r2)+n2

;store 11 in location 13

move

a,y:(r2)

;store 11 in location 0. r2-> BRY

endm

Freescale Semiconductor, Inc.

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