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DSP56300 датащи(PDF) 68 Page - Freescale Semiconductor, Inc

номер детали DSP56300
подробное описание детали  Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
PDF  108 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56300 датащи(HTML) 68 Page - Freescale Semiconductor, Inc

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5-4
Viterbi Decoder Implementation
Summary
Program Listings
Table 5-1
Viterbi Decoder Code Statistics
Another statistic worth noting is the program memory required by each program. The
basic Viterbi decoder code in Section 3 takes 178 program words, and the code in
Section 4
with all enhancements added takes 311. The large increase is mostly due to the
unrolling of some loops at the end, required to phase the ACSFlush and STOREPATHS
macros correctly. Notably, the amount of program space required for either routine is
quite small, and may not be a large consideration for most systems.
5.3
PROGRAM LISTINGS
Finally, note that there are three appendices to this application report. Each appendix
contains a program listing for the program as described on one of the sections of this
manual.
¥ Appendix A contains a listing for the complete code discussed in Section 3.
¥ Appendix B contains a complete listing of the code discussed in Section 4.
¥ Appendix C contains a complete listing of a 24-bit version of the Section 4 code,
suitable for implementation on a DSP56300 DSP operating in 24-bit arithmetic
mode.
Code Used
Total Clock
Cycles
Clock Cycles per
Information Bit
MIPS at 13,350
Data Rate
%
change
Basic Viterbi
36127
215.04
2.87
Ñ
Viterbi with
generalized
branch metrics
36668
218.26
3.31
+1.5%
+ACSFlush
36065
214.67
2.87
-0.172%
+Pre ACS
35459
211.07
2.81
-1.85%
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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