DSP56300 datasheet(84/108 Pages) FREESCALE

84 / 108 page

B-6

Viterbi Decoder Implementation

Extended Algorithm Program Listing

;*******************************;PreACS***************************************

;

FUNCTION: Update path metrics/paths for the Viterbi algorithm by ACS butterfly

;

from assumed 0 state to start, and double the number of states on each invocation

;

until the full trellis is used.

This routine CANNOT be used unless the encoder is

;

starting from an all 0's state.

Note this means it cannot be used if the data is

;

a continuation of a previously processed data stream.

Use the ACS macro instead. ;

However, for packetised data, or other data that assumes the data starts with the

;

encoder 0 filled, this routine saves cycles, AND only state 0 needs to be

;

initialised before starting the decode.

;

INPUTS:

;

r2 should point to the beginning of the branch metric table

;

r5 should point to the latest path metric for state 0

;

r4 should point to the storage location for updated state 0

;

n5 should be the number of input states/2 to process

;

n5 is doubled each time this macro is invoked

;

OUTPUTS:

;

Updated path metrics/paths stored in XY memory

;

REGISTERS USED:

;

a,b,y01,r2,r3,n3,r4,r5,n5 r2 unchanged (modulo req'd)

;

Registers:

;

r5, pointer to the path metric/path table, arranged as

;

x: path metric, y: path,states ordered assuming

;

bits shift right to left.

;

r4, pointer to the output path metric/path table

;

r0, pointer to the branch metric table, arranged

;

as x:C, y:D, CD,CD,CD, etc.

;

SA------NSA

;

D \

;

NSB

;*****************************************************************

PreACS

macro

;

move

#BRY,r2

;r2 points to branch metrics

move

r5,r3

;save r5 to init r4 later

move

r4,n3

;save r4 to init r5 later

move

l:(r2)+,ba

;get first branch metrics

move

l:(r5)+,y

;load 1st metric/path pair

n5,_P_NextStage

update each state

add

y,a

;update metric

add

y,b

l:(r5)+,y

;updt met, ld nxt pair

vsl

a,0,l:(r4)+

;end top half

vsl

b,1,l:(r4)+

;end 2nd half

move

l:(r2)+,ba

;ld br met

_P_NextStage

move

n5,b

;recall loop count

asl

n3,r5

;mult it by 2

move

r3,r4

move

b,n5

;storage for loop count

move

#BRY,r2

;reinit branch ptr

endm

Example B-1

Extended Algorithm Program Listing (Continued)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56300 датащи(PDF) 84 Page - Freescale Semiconductor, Inc

DSP56300 датащи(HTML) 84 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL