DSP56300 datasheet(22/108 Pages) FREESCALE

номер детали	DSP56300

подробное описание детали	Implementing Viterbi Decoders Using the VSL Instruction on DSP Families

PDF	108 Pages

Scroll/Zoom	100%

производитель	FREESCALE [Freescale Semiconductor, Inc]

домашняя страница	http://www.freescale.com

Logo

22 / 108 page

2-8

Viterbi Decoder Implementation

The Viterbi Algorithm

Viterbi Decoder

Figure 2-4

Using Multiple Input Paths to Collapse the State Tree

To find out how to choose the correct input branch for each state, we use the additivity

of the path metrics. Suppose we want to find the path with the largest metric that

extends from time i to time k (i<k). Also, suppose we are interested in another time j

such that i<j<k. For a given state (encoder state) S at time j, consider two paths P1 and

P2, extending from time i to time j, both entering state S at time j. To get from state S at

time j to time k, consider two more paths Q1 and Q2. Our setup so far is illustrated in

Figure 2-5

Let the path metric for P1 up to time j be PM1, and let the path metric for P2 up to time j

be PM2. Define QM1 and QM2 to be the partial path metrics for their respective paths.

By partial path metrics we mean the contribution due to the partial path only, that is,

QM1 is the path metric for path Q1 minus the value of the path metric of state S at time j.

Finally, assume that PM1>PM2. Then any path containing P2 cannot be the path with

largest path metric for any time after time j.

00000

0 00001

0 00000

10000

1 00001

1 00000

00000

10000

00000

00001

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56300 датащи(PDF) 22 Page - Freescale Semiconductor, Inc