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DSP56300 датащи(PDF) 34 Page - Freescale Semiconductor, Inc

номер детали DSP56300
подробное описание детали  Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
PDF  108 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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DSP56300 датащи(HTML) 34 Page - Freescale Semiconductor, Inc

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3-6
Viterbi Decoder Implementation
Expanding the Viterbi Algorithm
Creating the Branch Metrics
The next instruction is the VSL. VSL is a mnemonic for Viterbi Shift Left, a new
instruction tailored for Viterbi algorithm updates. The action of this instruction is to take
an accumulator a or b, store the mid-register (a1 or b1) in X memory, shift the
accumulator left, append a 0 or 1, as indicated by the instruction arguments, and store
the low register (a0 or b0) in Y memory. The net result is that path bits are updated and
the path metric/path pair stored in memory.
This VSL puts a 0 in the LSB of B0. In this way we store the input bit of this transition
(which is 0 regardless of the path chosen because the input bit is 0 as long as the
destination state is the upper state). Because we are storing recreated encoder bits, this
path string will be a recreation of the encoder input, which is what we want for the
decoder output. Of course, we can only store 16 or 24 bits of the path at a time (16 for
DSP56600 or DSP56300 in 16-bit arithmetic mode, 24 for DSP56300 otherwise).
Next, repeat the operations for the lower state update. Note we subtract and add, rather
than add and subtract, as required by the lower state update. The add instruction
reloads the second path metric/path pair, while the sub instruction increments the path
metric fetch pointer and loads the branch metric from the branch metric table, both for
use in the next loop iteration. The increment of the path metric fetch pointer is a dummy
read into x0 (i.e., x0 is not used). This allows us to use a second parallel move to
increment r5.
The max instruction finds the survivor path metric/path pair for the lower state, and
preloads the path metric/path pair for the next loop iteration. The last VSL instruction
shifts the survivor path left 1 bit, appends a 1 to represent the recreated encoder state for
the lower state, and stores the lower state path metric.
We now iterate this loop by the number of butterflies needed, and exit the macro.
3.4
CREATING THE BRANCH METRICS
To present the branch metric routine, we start with the encoding polynomials. For this
example, we start with the encoding polynomials. We then show how to create the
branch metrics we need (in the order required) to do the butterfly correctly. Recall that
the encoding polynomials are 1+D+D3+D5 and 1+D2+D3+D4+D5. There are 32 states in
the decoder, so we need 32 branch metrics. In general, we would access these metrics in
pairs in the butterfly routine, updating the states in pairs. As noted above, we can save
the work involved in half of these, because our polynomials induce a symmetry in the
branch metrics. By this we mean that the branch metrics for this code have the property
that the upper and lower input branches to any state are complementary.
Freescale Semiconductor, Inc.
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