PM7344 datasheet(98/293 Pages) PMC

98 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Registers 006H, 106H, 206H and 306H: Transmit TS0 Data Link

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

Unused

Bit 5

Unused

Bit 4

R/W

TXSA4EN

Bit 3

R/W

TXSA5EN

Bit 2

R/W

TXSA6EN

Bit 1

R/W

TXSA7EN

Bit 0

R/W

TXSA8EN

These registers are used when the E1 format is selected to choose timeslot 16

or the required subset of timeslot 0 National bits that constitute the transmit data

link.

TXSA4EN, TXSA5EN, TXSA6EN, TXSA7EN and TXSA8EN:

The TXSAxEN bits control the insertion of a data link into the Time Slot 0

National Use bits (Sa4 through Sa8).

These bits only have effect if the TRAN block Configuration DLEN bit is logic

0 or if the TRAN block Configuration SIGEN bit is logic 1. The TXSAxEN bits

take priority over the FDIS bit of the E1-TRAN block Configuration register.

The data link bits are still inserted if FDIS is logic 1.

If the TXDMASIG bit is a logic 1, the data link bits are sourced by the internal

HDLC transmitter; otherwise, the bits are sourced from the TDLSIG pin. If

the TXSA4EN bit is logic 1, the TDLSIG value is written into bit 4 of Time Slot

0 of non-frame alignment signal frames. If the TXSA8EN bit is logic 1, the

TDLSIG value is written into bit 8 of Time Slot 0 of non-frame alignment

signal frames. The other enable bits operate in an analogous fashion. A

clock pulse is generated on TDLCLK for each enable that is logic 1. Any

combination of enable bits is allowed, resulting in a data rate between 4 kbit/s

and 20 kbit/s. Clearing all disables insertion. Any National Use bits which are

not included in the data link are sourced from E1 TRAN block

International/National Control register.

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