PM7344 datasheet(27/293 Pages) PMC

27 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Figure 2

- Example 2. DS3 Port Carrying Multiplexed T1 or E1 ATM UNI

Signals

PM7344

S/UNI-MPH

PM8313

D3MX

Generic

Microprocessor

Bus

DSX-3

Analog

Interface

Crystal Oscillator Clock

12.352 MHz

1.544 MHz

Transmit

Reference Clock

PM7344

S/UNI-MPH

SCI-PHYTM

Multi-PHY

ATM Cell Bus

DSX-3

Line Interface With

Clock Recovery

Quad T1/E1

Multi-PHY

User Network Interface

Integrated M13

Multiplexer

6.312 MHz

Optional Transmit

Reference Clock

44.736 MHz

Transmit

Reference Clock

12.352 MHz

1.544 MHz

# 1

# 7

Quad T1/E1

Multi-PHY

User Network Interface

Example 2 shows seven PM7344 S/UNI-MPH devices used with a PM8313

D3MX device and a generic DSX-3 LIU device being used to implement a DS3

port where the DS3 carries a multiplex of DS1 (or E1) UNI signals.

In this example, each S/UNI-MPH provides four duplex DS1 signals to the D3MX

device which, in turn, performs the asynchronous multiplex and demultiplex

function required to map these into a DS3 signal. The D3MX may use the

traditional M23 format or may use the C-bit parity format when performing this

multiplex. Note that the D3MX may also be configured for G.747 multiplexing of

three E1 signals into each of the seven DS2 signals within the overall DS3

signal. Many generic DSX-3 line interface unit devices may be used with the

D3MX to implement a DSX-3 electrical interface on the high speed line side of

such a system. Each S/UNI-MPH device implements the T1 or E1 UNI function

for four T1 or E1 streams. The seven S/UNI-MPH devices may be serviced by a

common ATM layer device through a shared (SCI-PHYTM) multi-PHY bus.

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