PM7344 datasheet(96/293 Pages) PMC

96 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Registers 005H, 105H, 205H and 305H: Receive TS0 Data Link

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

R/W

SACE

Bit 5

SACI

Bit 4

R/W

RXSA4EN

Bit 3

R/W

RXSA5EN

Bit 2

R/W

RXSA6EN

Bit 1

R/W

RXSA7EN

Bit 0

R/W

RXSA8EN

These registers are used when the E1 format is selected to choose timeslot 16

or the required subset of timeslot 0 National bits that constitute the receive data

link.

SACE:

The SACE bit enables the generation of an interrupt whenever there is a

change in the National bits that are not extracted to form a data link.

Changes in the National bits are not debounced, i.e. the interrupt is

generated immediately when the current value of the National bits differs from

the previous value. The value of the National bits can be read in the FRMR

International/National Bits Register.

SACI:

The SACI bit is set to logic one whenever there is a change in the National

bits that are not extracted to form a data link. The SACI bit is cleared

following a read of this register.

RXSA4EN, RXSA5EN, RXSA6EN, RXSA7EN and RXSA8EN:

The RXSAxEN bits control the extraction of a data link from the received

Time Slot 0 National Use bits (Sa4 through Sa8).

If the RXDMASIG bit from the Datalink Options Register is a logic 1, the data

link bits are terminated by the internal HDLC receiver; otherwise, the data link

is presented on RDLSIG. If the RXSA4EN is logic 1, the RDLSIG value is

extracted from bit 4 of Time Slot 0 of non-frame alignment signal frames. If

the RXSA8EN is logic 1, the RDLSIG value is extracted from bit 8 of Time

Slot 0 of non-frame alignment signal frames. The other enable bits operate in

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