PM7344 datasheet(36/293 Pages) PMC

36 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Pin Name

Type

No.

Function

RCLKO

Output

Receive Clock Output (RCLKO). This signal is

recovered from the RDP and RDN inputs (if the

input format is dual-rail RZ), or from the RCLKI

input (if the input format is NRZ or if the T1/E1

framers are bypassed). Any one of the four sets

of RDP/RDN or RCLKI signals may be selected

as the source of RCLKO using internal registers.

RDLSIG[4]

RDLSIG[3]

RDLSIG[2]

RDLSIG[1]/

Output

100

Receive Data Link Signal (RDLSIG). The

RDLSIG signal is available on this pin when the

internal HDLC receiver (RFDL) is disabled from

use. When the S/UNI-MPH is configured to

receive T1-ESF formatted data, RDLSIG

contains the data stream extracted from the

facility data link; when the S/UNI-MPH is

configured to receive T1-SF formatted data, the

RDLSIG output is held low; when the S/UNI-

MPH is configured to receive E1 formatted data,

RDLSIG contains the data stream extracted

from timeslot 16 or a data stream made up of

any combination of the national bits. RDLSIG is

updated on the falling edge of RDLCLK.

RDLINT[4]

RDLINT[3]

RDLINT[2]

RDLINT[1]

Receive Data Link Interrupt (RDLINT). The

RDLINT signal is available on this pin when

RFDL is enabled. RDLINT goes high when an

event occurs which changes the status of the

HDLC receiver.

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