ADAU1361BCPZ-R7 datasheet(38/78 Pages) AD

38 / 78 page

Data Sheet

ADAU1361

CONTROL PORTS

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Rev. E | 38 of 78

I2C Read and Write Operations

Figure 50 shows the format of a single-word write operation. Every

ninth clock pulse, the ADAU1361 issues an acknowledge by pulling

SDA low.

Figure 51 shows the format of a burst mode write sequence.

This figure shows an example of a write to sequential single-byte

registers. The ADAU1361 increments its subaddress register after

every byte because the requested subaddress corresponds to a

Figure 52 shows the format of a single-word read operation. Note

that the first R/W bit is 0, indicating a write operation. This is

because the subaddress still needs to be written to set up the

internal address. After the ADAU1361 acknowledges the receipt of

the subaddress, the main must issue a repeated start command

followed by the chip address byte with the R/W bit set to 1 (read).

This causes the ADAU1361 SDA to reverse and begin driving data

back to the main. The main then responds every ninth pulse with an

acknowledge pulse to the ADAU1361.

Figure 53 shows the format of a burst mode read sequence. This

figure shows an example of a read from sequential single-byte

registers. The ADAU1361 increments its subaddress register after

every byte because the requested subaddress corresponds to a

always decodes the subaddress and sets the auto-increment circuit

so that the address increments after the appropriate number of

bytes.

Figure 50 to Figure 53 use the following abbreviations: S = start

bit P = stop bit AM = acknowledge by l AS = acknowledge by

subordinate

Figure 50. Single-Word I2C Write Format

Figure 51. Burst Mode I2C Write Format

Figure 52. Single-Word I2C Read Format

Figure 53. Burst Mode I2C Read Format

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