MFS5600AMBAFES datasheet(61/118 Pages) NXP

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NXP Semiconductors

FS5600

Automotive buck regulator and controller with voltage monitors and watchdog timer

The OTP_PGOOD1_DELAY[2:0] and OTP_PGOOD2_DELAY[2:0] timers run in parallel to the GPO timers and

do not need to expire to exit the power-up state. PGOOD1 and PGOOD2 may be released high even in the

INIT_RUN state.

17.13.4 Power-up in Debug mode

The FS5600 offers a Debug mode of operation that is useful during system bring up and/or development. When

in Debug mode, the following restrictions are in place:

• deep fail-safe transition is disabled

• Watchdog window duration is set to infinite

To power up in Debug Mode, apply VDDOTP_GPIO1 = 8 V before EN1 or EN2 go high or before VIN is applied.

In this condition, the FS5600 pauses power-up and waits for VDDOTP_GPIO1 < 1 V before continuing to power

up in Debug Mode. Ensure that there is board-level isolation on the VDDOTP_GPIO1 bus if the GPIO1 function

is used at a lower voltage level.

While VDDOTP_GPIO1 is maintained at 8 V, the following I2C commands can be sent to open access to the

OTP mirror registers:

SET_REG:FS5600:Functional:TM_ENTRY:0xD5A7

SET_REG:FS5600:Functional:TM_ENTRY:0xB8EE

SET_REG:FS5600:Functional:TM_ENTRY:0x0F37

The mirror registers modified in this fashion take effect during power-up when VDDOTP_GPIO < 1 V. Contact

your NXP representative for commands needed to access the mirror registers.

17.13.5 INIT_RUN

The INIT_RUN state is entered after the power-up state. Either or both SW1 and SW2 may be enabled to enter

the INIT_RUN state. The state machine can remain in the INIT_RUN state indefinitely. In this state, the state

machine waits for conditions to transition to the normal state if enabled to do so. Alternatively, the state machine

may proceed to power down to the deep fail-safe state if conditions enabling this are met.

INIT_RUN state may also be entered from the normal state by setting the GOTO_INIT_RUN and clearing the

NOT_GOTO_INIT_RUN bits.

17.13.6 Normal state

In the normal state, the FS0B pin is de-asserted to indicate to the system that essential parameters monitored

by the FS5600 are in expected range. The normal state is entered from the INIT_RUN state, provided

conditions for this transition are met. OTP_NORMAL_STATE_EN bit should be set to 1 to enable transition to

the normal state.

OTP_ERRMON1_SAFE = 1 is an enabling condition for a valid ERRMON1 signal to control transition to the

normal state. OTP_ERRMON2_SAFE = 1 is an enabling condition for a valid ERRMON2 signal to control

transition to the normal state. OTP_PGOOD1_SAFE = 1 is an enabling condition for a valid PGOOD1 output to

control transition to the normal state. OTP_PGOOD2_SAFE = 1 is an enabling condition for a valid PGOOD2

output to control transition to the normal state.

See Section 17.13.10 for conditions to transition to the normal state.

FS5600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 29 April 2024

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